f65df9b959
Simplify indirect predictor interface. Several of the existing functions where merged together into four clear once. Those four are similar to the main direction predictor interface. 'lookup', 'update', 'squash' and 'commit'. This makes the interface much more clear, allows better functionality isolation and makes it simpler to develop new predictor models. A new parameter is added to allow additional buffer space for speculative path history. Change-Id: I6d6b43965b2986ef959953a64c428e50bc68d38e Signed-off-by: David Schall <david.schall@ed.ac.uk>
553 lines
21 KiB
C++
553 lines
21 KiB
C++
/*
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* Copyright (c) 2011-2012, 2014 ARM Limited
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* Copyright (c) 2010,2022-2023 The University of Edinburgh
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* Copyright (c) 2012 Mark D. Hill and David A. Wood
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "cpu/pred/bpred_unit.hh"
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#include <algorithm>
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#include "arch/generic/pcstate.hh"
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#include "base/compiler.hh"
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#include "base/trace.hh"
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#include "debug/Branch.hh"
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namespace gem5
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{
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namespace branch_prediction
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{
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BPredUnit::BPredUnit(const Params ¶ms)
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: SimObject(params),
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numThreads(params.numThreads),
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predHist(numThreads),
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btb(params.btb),
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RAS(numThreads),
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iPred(params.indirectBranchPred),
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stats(this),
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instShiftAmt(params.instShiftAmt)
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{
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for (auto& r : RAS)
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r.init(params.RASSize);
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}
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BPredUnit::BPredUnitStats::BPredUnitStats(statistics::Group *parent)
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: statistics::Group(parent),
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ADD_STAT(lookups, statistics::units::Count::get(),
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"Number of BP lookups"),
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ADD_STAT(condPredicted, statistics::units::Count::get(),
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"Number of conditional branches predicted"),
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ADD_STAT(condIncorrect, statistics::units::Count::get(),
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"Number of conditional branches incorrect"),
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ADD_STAT(BTBLookups, statistics::units::Count::get(),
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"Number of BTB lookups"),
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ADD_STAT(BTBUpdates, statistics::units::Count::get(),
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"Number of BTB updates"),
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ADD_STAT(BTBHits, statistics::units::Count::get(), "Number of BTB hits"),
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ADD_STAT(BTBHitRatio, statistics::units::Ratio::get(), "BTB Hit Ratio",
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BTBHits / BTBLookups),
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ADD_STAT(RASUsed, statistics::units::Count::get(),
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"Number of times the RAS was used to get a target."),
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ADD_STAT(RASIncorrect, statistics::units::Count::get(),
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"Number of incorrect RAS predictions."),
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ADD_STAT(indirectLookups, statistics::units::Count::get(),
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"Number of indirect predictor lookups."),
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ADD_STAT(indirectHits, statistics::units::Count::get(),
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"Number of indirect target hits."),
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ADD_STAT(indirectMisses, statistics::units::Count::get(),
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"Number of indirect misses."),
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ADD_STAT(indirectMispredicted, statistics::units::Count::get(),
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"Number of mispredicted indirect branches.")
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{
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BTBHitRatio.precision(6);
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}
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probing::PMUUPtr
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BPredUnit::pmuProbePoint(const char *name)
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{
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probing::PMUUPtr ptr;
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ptr.reset(new probing::PMU(getProbeManager(), name));
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return ptr;
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}
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void
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BPredUnit::regProbePoints()
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{
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ppBranches = pmuProbePoint("Branches");
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ppMisses = pmuProbePoint("Misses");
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}
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void
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BPredUnit::drainSanityCheck() const
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{
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// We shouldn't have any outstanding requests when we resume from
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// a drained system.
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for ([[maybe_unused]] const auto& ph : predHist)
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assert(ph.empty());
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}
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bool
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BPredUnit::predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
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PCStateBase &pc, ThreadID tid)
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{
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// See if branch predictor predicts taken.
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// If so, get its target addr either from the BTB or the RAS.
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// Save off record of branch stuff so the RAS can be fixed
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// up once it's done.
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bool pred_taken = false;
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std::unique_ptr<PCStateBase> target(pc.clone());
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++stats.lookups;
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ppBranches->notify(1);
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void *bp_history = NULL;
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void *indirect_history = NULL;
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if (inst->isUncondCtrl()) {
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DPRINTF(Branch, "[tid:%i] [sn:%llu] Unconditional control\n",
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tid,seqNum);
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pred_taken = true;
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// Tell the BP there was an unconditional branch.
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uncondBranch(tid, pc.instAddr(), bp_history);
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} else {
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++stats.condPredicted;
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pred_taken = lookup(tid, pc.instAddr(), bp_history);
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DPRINTF(Branch, "[tid:%i] [sn:%llu] "
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"Branch predictor predicted %i for PC %s\n",
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tid, seqNum, pred_taken, pc);
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}
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DPRINTF(Branch,
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"[tid:%i] [sn:%llu] Creating prediction history for PC %s\n",
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tid, seqNum, pc);
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PredictorHistory predict_record(seqNum, pc.instAddr(), pred_taken,
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bp_history, indirect_history, tid, inst);
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// Now lookup in the BTB or RAS.
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if (pred_taken) {
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// Note: The RAS may be both popped and pushed to
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// support coroutines.
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if (inst->isReturn()) {
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++stats.RASUsed;
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predict_record.wasReturn = true;
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// If it's a function return call, then look up the address
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// in the RAS.
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const PCStateBase *ras_top = RAS[tid].top();
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if (ras_top)
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set(target, inst->buildRetPC(pc, *ras_top));
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// Record the top entry of the RAS, and its index.
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predict_record.usedRAS = true;
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predict_record.RASIndex = RAS[tid].topIdx();
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set(predict_record.RASTarget, ras_top);
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RAS[tid].pop();
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DPRINTF(Branch, "[tid:%i] [sn:%llu] Instruction %s is a return, "
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"RAS predicted target: %s, RAS index: %i\n",
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tid, seqNum, pc, *target, predict_record.RASIndex);
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}
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if (inst->isCall()) {
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RAS[tid].push(pc);
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predict_record.pushedRAS = true;
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// Record that it was a call so that the top RAS entry can
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// be popped off if the speculation is incorrect.
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predict_record.wasCall = true;
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DPRINTF(Branch,
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"[tid:%i] [sn:%llu] Instruction %s was a call, adding "
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"%s to the RAS index: %i\n",
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tid, seqNum, pc, pc, RAS[tid].topIdx());
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}
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// The target address is not predicted by RAS.
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// Thus, BTB/IndirectBranch Predictor is employed.
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if (!inst->isReturn()) {
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if (inst->isDirectCtrl() || !iPred) {
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++stats.BTBLookups;
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// Check BTB on direct branches
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const PCStateBase * btb_target = btb->lookup(tid,
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pc.instAddr(),
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getBranchType(inst));
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if (btb_target) {
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++stats.BTBHits;
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// If it's not a return, use the BTB to get target addr.
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set(target, btb_target);
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DPRINTF(Branch,
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"[tid:%i] [sn:%llu] Instruction %s predicted "
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"target is %s\n",
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tid, seqNum, pc, *target);
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} else {
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DPRINTF(Branch, "[tid:%i] [sn:%llu] BTB doesn't have a "
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"valid entry\n", tid, seqNum);
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pred_taken = false;
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predict_record.predTaken = pred_taken;
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// The Direction of the branch predictor is altered
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// because the BTB did not have an entry
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// The predictor needs to be updated accordingly
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if (!inst->isCall() && !inst->isReturn()) {
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btbUpdate(tid, pc.instAddr(), bp_history);
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DPRINTF(Branch,
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"[tid:%i] [sn:%llu] btbUpdate "
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"called for %s\n",
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tid, seqNum, pc);
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} else if (inst->isCall() && !inst->isUncondCtrl()) {
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RAS[tid].pop();
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predict_record.pushedRAS = false;
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}
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inst->advancePC(*target);
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}
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} else {
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predict_record.wasIndirect = true;
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++stats.indirectLookups;
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//Consult indirect predictor on indirect control
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const PCStateBase *itarget = iPred->lookup(tid,
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seqNum, pc.instAddr(),
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predict_record.indirectHistory);
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if (itarget) {
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// Indirect predictor hit
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++stats.indirectHits;
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set(target, *itarget);
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DPRINTF(Branch,
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"[tid:%i, sn:%llu] Instruction %s predicted "
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"indirect target is %s\n",
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tid, seqNum, pc, *target);
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} else {
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++stats.indirectMisses;
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pred_taken = false;
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predict_record.predTaken = pred_taken;
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DPRINTF(Branch,
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"[tid:%i, sn:%llu] PC:%#x no indirect target\n",
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tid, seqNum, pc.instAddr());
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if (!inst->isCall() && !inst->isReturn()) {
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} else if (inst->isCall() && !inst->isUncondCtrl()) {
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RAS[tid].pop();
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predict_record.pushedRAS = false;
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}
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inst->advancePC(*target);
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}
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}
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}
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} else {
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if (inst->isReturn()) {
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predict_record.wasReturn = true;
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}
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inst->advancePC(*target);
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}
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predict_record.target = target->instAddr();
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set(pc, *target);
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if (iPred) {
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// Update the indirect predictor with the direction prediction
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iPred->update(tid, seqNum, predict_record.pc, false,
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predict_record.predTaken, *target,
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getBranchType(inst),
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predict_record.indirectHistory);
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}
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predHist[tid].push_front(predict_record);
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DPRINTF(Branch,
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"[tid:%i] [sn:%llu] History entry added. "
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"predHist.size(): %i\n",
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tid, seqNum, predHist[tid].size());
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return pred_taken;
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}
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void
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BPredUnit::update(const InstSeqNum &done_sn, ThreadID tid)
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{
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DPRINTF(Branch, "[tid:%i] Committing branches until "
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"sn:%llu]\n", tid, done_sn);
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while (!predHist[tid].empty() &&
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predHist[tid].back().seqNum <= done_sn) {
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// Update the branch predictor with the correct results.
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update(tid, predHist[tid].back().pc,
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predHist[tid].back().predTaken,
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predHist[tid].back().bpHistory, false,
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predHist[tid].back().inst,
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predHist[tid].back().target);
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// Commite also Indirect predictor and RAS
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if (iPred) {
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iPred->commit(tid, predHist[tid].back().seqNum,
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predHist[tid].back().indirectHistory);
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}
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predHist[tid].pop_back();
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}
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}
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void
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BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid)
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{
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History &pred_hist = predHist[tid];
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while (!pred_hist.empty() &&
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pred_hist.front().seqNum > squashed_sn) {
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if (pred_hist.front().wasCall && pred_hist.front().pushedRAS) {
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// Was a call but predicated false. Pop RAS here
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DPRINTF(Branch, "[tid:%i] [squash sn:%llu] Squashing"
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" Call [sn:%llu] PC: %s Popping RAS\n", tid, squashed_sn,
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pred_hist.front().seqNum, pred_hist.front().pc);
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RAS[tid].pop();
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}
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if (pred_hist.front().usedRAS) {
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if (pred_hist.front().RASTarget != nullptr) {
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DPRINTF(Branch, "[tid:%i] [squash sn:%llu]"
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" Restoring top of RAS to: %i,"
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" target: %s\n", tid, squashed_sn,
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pred_hist.front().RASIndex,
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*pred_hist.front().RASTarget);
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}
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else {
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DPRINTF(Branch, "[tid:%i] [squash sn:%llu]"
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" Restoring top of RAS to: %i,"
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" target: INVALID_TARGET\n", tid, squashed_sn,
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pred_hist.front().RASIndex);
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}
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RAS[tid].restore(pred_hist.front().RASIndex,
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pred_hist.front().RASTarget.get());
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}
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// This call should delete the bpHistory.
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squash(tid, pred_hist.front().bpHistory);
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if (iPred) {
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iPred->squash(tid, pred_hist.front().seqNum,
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pred_hist.front().indirectHistory);
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}
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DPRINTF(Branch, "[tid:%i] [squash sn:%llu] "
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"Removing history for [sn:%llu] "
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"PC %#x\n", tid, squashed_sn, pred_hist.front().seqNum,
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pred_hist.front().pc);
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pred_hist.pop_front();
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DPRINTF(Branch, "[tid:%i] [squash sn:%llu] predHist.size(): %i\n",
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tid, squashed_sn, predHist[tid].size());
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}
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}
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void
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BPredUnit::squash(const InstSeqNum &squashed_sn,
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const PCStateBase &corr_target,
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bool actually_taken, ThreadID tid)
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{
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// Now that we know that a branch was mispredicted, we need to undo
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// all the branches that have been seen up until this branch and
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// fix up everything.
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// NOTE: This should be call conceivably in 2 scenarios:
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// (1) After an branch is executed, it updates its status in the ROB
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// The commit stage then checks the ROB update and sends a signal to
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// the fetch stage to squash history after the mispredict
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// (2) In the decode stage, you can find out early if a unconditional
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// PC-relative, branch was predicted incorrectly. If so, a signal
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// to the fetch stage is sent to squash history after the mispredict
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History &pred_hist = predHist[tid];
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++stats.condIncorrect;
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ppMisses->notify(1);
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DPRINTF(Branch, "[tid:%i] Squashing from sequence number %i, "
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"setting target to %s\n", tid, squashed_sn, corr_target);
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// Squash All Branches AFTER this mispredicted branch
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squash(squashed_sn, tid);
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// If there's a squash due to a syscall, there may not be an entry
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// corresponding to the squash. In that case, don't bother trying to
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// fix up the entry.
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if (!pred_hist.empty()) {
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auto hist_it = pred_hist.begin();
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//HistoryIt hist_it = find(pred_hist.begin(), pred_hist.end(),
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// squashed_sn);
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//assert(hist_it != pred_hist.end());
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if (pred_hist.front().seqNum != squashed_sn) {
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DPRINTF(Branch, "Front sn %i != Squash sn %i\n",
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pred_hist.front().seqNum, squashed_sn);
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assert(pred_hist.front().seqNum == squashed_sn);
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}
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if ((*hist_it).usedRAS) {
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++stats.RASIncorrect;
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DPRINTF(Branch,
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"[tid:%i] [squash sn:%llu] Incorrect RAS [sn:%llu]\n",
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tid, squashed_sn, hist_it->seqNum);
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}
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// There are separate functions for in-order and out-of-order
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// branch prediction, but not for update. Therefore, this
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// call should take into account that the mispredicted branch may
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// be on the wrong path (i.e., OoO execution), and that the counter
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// counter table(s) should not be updated. Thus, this call should
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// restore the state of the underlying predictor, for instance the
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// local/global histories. The counter tables will be updated when
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// the branch actually commits.
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// Remember the correct direction for the update at commit.
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pred_hist.front().predTaken = actually_taken;
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pred_hist.front().target = corr_target.instAddr();
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update(tid, (*hist_it).pc, actually_taken,
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pred_hist.front().bpHistory, true, pred_hist.front().inst,
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corr_target.instAddr());
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// Correct Indirect predictor -------------------
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if (iPred) {
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iPred->update(tid, squashed_sn, (*hist_it).pc,
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true, actually_taken, corr_target,
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getBranchType(pred_hist.front().inst),
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(*hist_it).indirectHistory);
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}
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if (actually_taken) {
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if (hist_it->wasReturn && !hist_it->usedRAS) {
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DPRINTF(Branch, "[tid:%i] [squash sn:%llu] "
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"Incorrectly predicted "
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"return [sn:%llu] PC: %#x\n", tid, squashed_sn,
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hist_it->seqNum,
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hist_it->pc);
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RAS[tid].pop();
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hist_it->usedRAS = true;
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}
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if (hist_it->wasIndirect) {
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++stats.indirectMispredicted;
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} else {
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DPRINTF(Branch,"[tid:%i] [squash sn:%llu] "
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"BTB Update called for [sn:%llu] "
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"PC %#x\n", tid, squashed_sn,
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hist_it->seqNum, hist_it->pc);
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++stats.BTBUpdates;
|
|
btb->update(tid, hist_it->pc, corr_target,
|
|
getBranchType(hist_it->inst));
|
|
}
|
|
} else {
|
|
//Actually not Taken
|
|
if (hist_it->wasCall && hist_it->pushedRAS) {
|
|
//Was a Call but predicated false. Pop RAS here
|
|
DPRINTF(Branch,
|
|
"[tid:%i] [squash sn:%llu] "
|
|
"Incorrectly predicted "
|
|
"Call [sn:%llu] PC: %s Popping RAS\n",
|
|
tid, squashed_sn,
|
|
hist_it->seqNum, hist_it->pc);
|
|
RAS[tid].pop();
|
|
hist_it->pushedRAS = false;
|
|
}
|
|
if (hist_it->usedRAS) {
|
|
|
|
std::string RASTarget;
|
|
|
|
DPRINTF(Branch,
|
|
"[tid:%i] [squash sn:%llu] Incorrectly predicted "
|
|
"return [sn:%llu] PC: %#x Restoring RAS\n", tid,
|
|
squashed_sn,
|
|
hist_it->seqNum, hist_it->pc);
|
|
if (hist_it->RASTarget) {
|
|
std::ostringstream os;
|
|
os << *hist_it->RASTarget.get();
|
|
RASTarget = os.str();
|
|
} else {
|
|
RASTarget = "no RAS";
|
|
}
|
|
DPRINTF(Branch,
|
|
"[tid:%i] [squash sn:%llu] Restoring top of RAS "
|
|
"to: %i, target: %s\n", tid, squashed_sn,
|
|
hist_it->RASIndex, RASTarget.c_str());
|
|
RAS[tid].restore(hist_it->RASIndex, hist_it->RASTarget.get());
|
|
hist_it->usedRAS = false;
|
|
}
|
|
}
|
|
} else {
|
|
DPRINTF(Branch, "[tid:%i] [sn:%llu] pred_hist empty, can't "
|
|
"update\n", tid, squashed_sn);
|
|
}
|
|
}
|
|
|
|
void
|
|
BPredUnit::dump()
|
|
{
|
|
int i = 0;
|
|
for (const auto& ph : predHist) {
|
|
if (!ph.empty()) {
|
|
auto pred_hist_it = ph.begin();
|
|
|
|
cprintf("predHist[%i].size(): %i\n", i++, ph.size());
|
|
|
|
while (pred_hist_it != ph.end()) {
|
|
cprintf("sn:%llu], PC:%#x, tid:%i, predTaken:%i, "
|
|
"bpHistory:%#x\n",
|
|
pred_hist_it->seqNum, pred_hist_it->pc,
|
|
pred_hist_it->tid, pred_hist_it->predTaken,
|
|
pred_hist_it->bpHistory);
|
|
pred_hist_it++;
|
|
}
|
|
|
|
cprintf("\n");
|
|
}
|
|
}
|
|
}
|
|
|
|
} // namespace branch_prediction
|
|
} // namespace gem5
|