Files
gem5/src/sim/System.py
Mitch Hayenga 52d521e433 cpu: Change thread assignments for heterogenous SMT
Trying to run an SE system with varying threads per core (SMT cores + Non-SMT
cores) caused failures due to the CPU id assignment logic.  The comment
about thread assignment (worrying about core 0 not having tid 0) seems
not to be valid given that our configuration scripts initialize them in
order.

This removes that constraint so a heterogenously threaded sytem can work.
2015-09-30 11:14:19 -05:00

4.9 KiB