Files
gem5/src/dev/x86/SConscript
Steve Reinhardt 502ad1e675 dev: consistently end device classes in 'Device'
PciDev and IntDev stuck out as the only device classes that
ended in 'Dev' rather than 'Device'.  This patch takes care
of that inconsistency.

Note that you may need to delete pre-existing files matching
build/*/python/m5/internal/param_* as scons does not pick up
indirect dependencies on imported python modules when generating
params, and the PciDev -> PciDevice rename takes place in a
file (dev/Device.py) that gets imported quite a bit.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2013-07-11 21:56:50 -05:00

71 lines
2.5 KiB
Python

# -*- mode:python -*-
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Gabe Black
Import('*')
if env['TARGET_ISA'] == 'x86':
SimObject('Pc.py')
Source('pc.cc')
SimObject('SouthBridge.py')
Source('south_bridge.cc')
SimObject('Cmos.py')
Source('cmos.cc')
DebugFlag('CMOS', 'Accesses to CMOS devices')
SimObject('I8259.py')
Source('i8259.cc')
DebugFlag('I8259', 'Accesses to the I8259 PIC devices')
SimObject('I8254.py')
Source('i8254.cc')
DebugFlag('I8254', 'Interrupts from the I8254 timer');
SimObject('I8237.py')
Source('i8237.cc')
DebugFlag('I8237', 'The I8237 dma controller');
SimObject('I8042.py')
Source('i8042.cc')
DebugFlag('I8042', 'The I8042 keyboard controller');
SimObject('PcSpeaker.py')
Source('speaker.cc')
DebugFlag('PcSpeaker')
SimObject('I82094AA.py')
Source('i82094aa.cc')
DebugFlag('I82094AA')
SimObject('X86IntPin.py')
Source('intdev.cc')
DebugFlag('IntDevice')