Chander Sudanthi 4bf48a11ef Trace: Allow printing ASIDs and selectively tracing based on user/kernel code. ...

Debug flags are ExecUser, ExecKernel, and ExecAsid. ExecUser and
ExecKernel are set by default when Exec is specified.  Use minus
sign with ExecUser or ExecKernel to remove user or kernel tracing
respectively.

2011-05-13 17:27:00 -05:00

..

checker

includes: sort all includes

2011-04-15 10:44:06 -07:00

inorder

work around gcc 4.5 warning

2011-05-09 16:34:11 -04:00

nocpu

SCons: Support building without an ISA

2010-11-19 18:00:39 -06:00

o3

O3: Fix an issue with a load & branch instruction and mem dep squashing

2011-05-13 17:27:00 -05:00

ozone

includes: sort all includes

2011-04-15 10:44:06 -07:00

pred

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

simple

CPU: Add some useful debug message to the timing simple cpu.

2011-05-04 20:38:27 -05:00

testers

NetworkTest: added sim_cycles parameter to the network tester.

2011-05-07 17:43:30 -04:00

trace

includes: sort all includes

2011-04-15 10:44:06 -07:00

activity.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

activity.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

base_dyn_inst_impl.hh

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

base_dyn_inst.hh

CPU: Remove references to memory copy operations

2011-04-04 11:42:26 -05:00

base.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

base.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

BaseCPU.py

mips: cleanup ISA-specific code

2011-03-26 09:23:52 -04:00

CheckerCPU.py

python: Move more code into m5.util allow SCons to use that code.

2009-09-22 15:24:16 -07:00

cpuevent.cc

…

cpuevent.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

exec_context.hh

ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.

2010-11-08 13:58:22 -06:00

exetrace.cc

Trace: Allow printing ASIDs and selectively tracing based on user/kernel code.

2011-05-13 17:27:00 -05:00

exetrace.hh

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

ExeTracer.py

SimObjects: Clean up handling of C++ namespaces.

2008-10-09 22:19:39 -07:00

func_unit.cc

params: Deprecate old-style constructors; update most SimObject constructors.

2007-08-30 15:16:59 -04:00

func_unit.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

FuncUnit.py

CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.

2010-11-15 14:04:04 -06:00

inst_seq.hh

build: fix compile problems pointed out by gcc 4.4

2009-11-04 16:57:01 -08:00

inteltrace.cc

Make commenting on close namespace brackets consistent.

2011-01-03 14:35:43 -08:00

inteltrace.hh

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

IntelTrace.py

SimObjects: Clean up handling of C++ namespaces.

2008-10-09 22:19:39 -07:00

intr_control.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

intr_control.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

IntrControl.py

Move SimObject python files alongside the C++ and fix

2007-05-27 19:21:17 -07:00

legiontrace.cc

Make commenting on close namespace brackets consistent.

2011-01-03 14:35:43 -08:00

legiontrace.hh

Make commenting on close namespace brackets consistent.

2011-01-03 14:35:43 -08:00

LegionTrace.py

SimObjects: Clean up handling of C++ namespaces.

2008-10-09 22:19:39 -07:00

m5legion_interface.h

add fsr to the list of registers we are interested in

2007-01-30 18:27:04 -05:00

nativetrace.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

nativetrace.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

NativeTrace.py

ARM: Make native trace print out what instruction caused an error.

2009-07-27 00:54:09 -07:00

op_class.hh

CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.

2010-11-15 14:04:04 -06:00

pc_event.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

pc_event.hh

types: Move stuff for global types into src/base/types.hh

2009-05-17 14:34:50 -07:00

profile.cc

includes: sort all includes

2011-04-15 10:44:06 -07:00

profile.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

quiesce_event.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

quiesce_event.hh

Make the Event::description() a const function

2008-02-06 16:32:40 -05:00

sched_list.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

SConscript

Trace: Allow printing ASIDs and selectively tracing based on user/kernel code.

2011-05-13 17:27:00 -05:00

simple_thread.cc

Replace curTick global variable with accessor functions.

2011-01-07 21:50:29 -08:00

simple_thread.hh

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

smt.hh

includes: fix up code after sorting

2011-04-15 10:44:14 -07:00

static_inst.cc

includes: sort all includes

2011-04-15 10:44:06 -07:00

static_inst.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

thread_context.cc

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

thread_context.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

thread_state.cc

CPU: Get rid of the now unnecessary getInst/setInst family of functions.

2010-09-13 21:58:34 -07:00

thread_state.hh

includes: sort all includes

2011-04-15 10:44:06 -07:00

timebuf.hh

Move sched_list.hh and timebuf.hh from src/base to src/cpu.

2011-01-03 14:35:47 -08:00

translation.hh

O3: Enhance data address translation by supporting hardware page table walkers.

2011-02-11 18:29:35 -06:00