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Rather than force all x86 microops to have one destination and two sources, the second of which is a register or immediate, make it possible for these microops to pick any combination of those elements by modularizing the operand aspects of the base class. This prevents having a bunch of extra parameters and members of the classes, or having a lot of explicitly laid out classes with various combinations. This also improves the accuracy/usefulness of Exec traces since register types and therefore names will be determined correctly. Also, there was a branchTarget override added to all register uops which would be used when the macroop was an direct control transfer instruction. The assumption was that the immediate value of the whole instruction would be the PC offset, which is not necessarily correct but is probably a fairly safe assumption. This override was only provided for all *register* uops though, and there's nothing saying the last uop in a branch instruction has to be a a register uop. This change moves that override to the uop base class so that *any* uop can be last in the macroop and still support branchTarget correctly (or at least as correctly as a register uop would). Change-Id: I9d42d22609d511fa757a784c04a5a9874beca479 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42343 Reviewed-by: Gabe Black <gabe.black@gmail.com> Maintainer: Gabe Black <gabe.black@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
This is the gem5 simulator. The main website can be found at http://www.gem5.org A good starting point is http://www.gem5.org/about, and for more information about building the simulator and getting started please see http://www.gem5.org/documentation and http://www.gem5.org/documentation/learning_gem5/introduction. To build gem5, you will need the following software: g++ or clang, Python (gem5 links in the Python interpreter), SCons, SWIG, zlib, m4, and lastly protobuf if you want trace capture and playback support. Please see http://www.gem5.org/documentation/general_docs/building for more details concerning the minimum versions of the aforementioned tools. Once you have all dependencies resolved, type 'scons build/<ARCH>/gem5.opt' where ARCH is one of ARM, NULL, MIPS, POWER, SPARC, or X86. This will build an optimized version of the gem5 binary (gem5.opt) for the the specified architecture. See http://www.gem5.org/documentation/general_docs/building for more details and options. The basic source release includes these subdirectories: - configs: example simulation configuration scripts - ext: less-common external packages needed to build gem5 - src: source code of the gem5 simulator - system: source for some optional system software for simulated systems - tests: regression tests - util: useful utility programs and files To run full-system simulations, you will need compiled system firmware (console and PALcode for Alpha), kernel binaries and one or more disk images. If you have questions, please send mail to gem5-users@gem5.org Enjoy using gem5 and please share your modifications and extensions.