Gabe Black 41f38a559b mem: Put gem5 protocols in their own directory. ...

This reduces clutter in the src/mem directory, and makes it clear that
those protocols are for the classic gem5 memory system, not ruby, TLM,
etc.

Change-Id: I6cf6b21134d82f4f01991e4fe92dbea8c7e82081
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20231
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>

2019-08-23 21:13:33 +00:00

..

arch

arch-riscv: Update register file

2019-08-21 17:52:54 +00:00

base

base: assert that stats bucket size is greater than 0

2019-08-21 12:16:48 +00:00

cpu

mem: Move ruby protocols into a directory called ruby_protocol.

2019-08-23 21:13:07 +00:00

dev

dev-arm: Start using GITS_CTLR.quiescent bit

2019-08-22 08:49:00 +00:00

doc

mem: Minimize the use of MemObject.

2019-04-28 01:19:40 +00:00

doxygen

MEM: Put memory system document into doxygen

2012-09-25 11:49:41 -05:00

gpu-compute

arch, base, cpu, gpu, sim: Merge getMemProxy and getVirtProxy.

2019-05-30 14:20:03 +00:00

kern

kern: Replace an explicitly instantiated port proxy with one from the tc.

2019-05-30 14:20:03 +00:00

learning_gem5

mem: Move ruby protocols into a directory called ruby_protocol.

2019-08-23 21:13:07 +00:00

mem

mem: Put gem5 protocols in their own directory.

2019-08-23 21:13:33 +00:00

proto

cpu: Stop extracting inst_flags from the machInst.

2018-03-27 10:57:36 +00:00

python

python: FdtState using interrupt-cells

2019-08-12 18:17:45 +00:00

sim

sim: Add a hook Clocked objects can implement for frequency changes.

2019-08-13 22:32:31 +00:00

systemc

systemc: Provide Port wrapper classes for sc_port

2019-08-05 03:19:36 +00:00

unittest

python: Replace dict.has_key with 'key in dict'

2019-02-12 17:36:12 +00:00

Doxyfile

misc: Fix BaseCPU doxygen

2018-07-10 16:41:40 +00:00

SConscript

scons: Move the marshal binary to the build directory

2019-05-21 15:46:50 +00:00