gem5/src/arch/x86 at 3e8e813218e7779a41bc12caae33db5e239506c9 - gem5

bios

includes: sort includes again

2009-05-17 14:34:52 -07:00

insts

X86: Set up a named constant for the "fold bit" for int register indices.

2009-07-17 18:49:22 -07:00

isa

X86: Tame the wilds of def operands.

2009-07-17 00:29:56 -07:00

linux

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

apicregs.hh

X86: Start implementing the interrupt command register in the local APIC.

2009-04-19 02:43:22 -07:00

arguments.hh

Add build hooks for x86.

2007-03-03 16:01:48 +00:00

cpuid.cc

X86: Fix the ordering of the vendor string reported by CPUID.

2009-04-19 04:13:45 -07:00

cpuid.hh

includes: use base/types.hh not inttypes.h or stdint.h

2009-05-17 14:34:51 -07:00

emulenv.cc

X86: Actually handle 16 bit mode modrm.

2009-04-19 04:14:31 -07:00

emulenv.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

faults.cc

X86: Keep track of more descriptor state to accomodate KVM.

2009-05-28 23:27:56 -07:00

faults.hh

X86: Implement the STARTUP IPI.

2009-04-19 02:56:03 -07:00

floatregs.hh

X86: Fix x87 stack register indexing.

2009-07-16 09:26:38 -07:00

interrupts.cc

X86: Tell the function that sends int messages who to send to instead of figuring it out itself.

2009-04-26 02:09:27 -07:00

interrupts.hh

X86: Make the local APICs register themselves with the IO APIC.

2009-04-26 02:09:13 -07:00

intmessage.hh

includes: sort includes again

2009-05-17 14:34:52 -07:00

intregs.hh

X86: Set up a named constant for the "fold bit" for int register indices.

2009-07-17 18:49:22 -07:00

isa_traits.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

isa.cc

X86: Shift some register flattening work into the decoder.

2009-07-17 00:29:42 -07:00

isa.hh

X86: Set up a named constant for the "fold bit" for int register indices.

2009-07-17 18:49:22 -07:00

kernel_stats.hh

X86: Get X86_FS to compile.

2007-09-24 17:39:56 -07:00

locked_mem.hh

Stub implementation for x86

2007-03-05 16:08:18 +00:00

microcode_rom.hh

X86: Make X86's microcode ROM actually do something.

2008-10-12 17:48:44 -07:00

miscregs.hh

X86: Add some misc registers for FP control state.

2009-07-19 23:51:41 -07:00

mmaped_ipr.hh

X86: Make the local APIC accessible through the memory system directly, and make the timer work.

2008-10-12 11:08:00 -07:00

nativetrace.cc

CPU: Separate out native trace into ISA (in)dependent code and SimObjects.

2009-07-19 23:54:56 -07:00

nativetrace.hh

CPU: Separate out native trace into ISA (in)dependent code and SimObjects.

2009-07-19 23:54:56 -07:00

pagetable_walker.cc

X86: Fix minor bug in the page table walker from TLB shuffling.

2009-04-13 04:14:15 -07:00

pagetable_walker.hh

includes: sort includes again

2009-05-17 14:34:52 -07:00

pagetable.cc

TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system.

2007-10-25 19:04:44 -07:00

pagetable.hh

includes: sort includes again

2009-05-17 14:34:52 -07:00

predecoder_tables.cc

X86: Hook in the M5 pseudo insts.

2009-01-06 23:55:46 -08:00

predecoder.cc

includes: sort includes again

2009-05-17 14:34:52 -07:00

predecoder.hh

types: Move stuff for global types into src/base/types.hh

2009-05-17 14:34:50 -07:00

process.cc

X86: Move a displaced comment back to where it goes.

2009-07-19 23:51:47 -07:00

process.hh

X86: Add a vsyscall page for 32 bit processes to use.

2009-02-27 09:25:51 -08:00

registers.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

remote_gdb.cc

arch: TheISA shouldn't really ever be used in the arch directory.

2008-09-27 21:03:46 -07:00

remote_gdb.hh

Add in NumGDBRegs so the constructor to the base class can get all it's arguments.

2007-03-05 17:58:15 +00:00

SConscript

CPU: Separate out native trace into ISA (in)dependent code and SimObjects.

2009-07-19 23:54:56 -07:00

SConsopts

copyright: This file need not have had the more restrictive copyright.

2009-02-09 20:10:15 -08:00

segmentregs.hh

X86: Reorganize segmentation and implement segment selector movs.

2007-12-01 23:03:39 -08:00

stacktrace.cc

Remove delVirtPort() and make getVirtPort() only return cached version.

2008-07-01 10:25:07 -04:00

stacktrace.hh

Filled in a stub header file for a stacktrace object. I'm still not sure what this is for, and it probably doesn't work on anything but Alpha.

2007-03-05 14:52:28 +00:00

system.cc

X86: Keep track of more descriptor state to accomodate KVM.

2009-05-28 23:27:56 -07:00

system.hh

X86: Create SimObjects in python and C++ to represent the ACPI system description tables.

2008-10-10 23:43:33 -07:00

tlb.cc

Registers: Eliminate the ISA defined floating point register file.

2009-07-08 23:02:20 -07:00

tlb.hh

X86: Split out the internal memory space from the regular translate() and precompute mode.

2009-04-26 16:48:44 -07:00

types.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

utility.cc

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

utility.hh

Registers: Add a registers.hh file as an ISA switched header.

2009-07-08 23:02:21 -07:00

vtophys.cc

X86: Get X86_FS to compile.

2007-09-24 17:39:56 -07:00

vtophys.hh

types: Move stuff for global types into src/base/types.hh

2009-05-17 14:34:50 -07:00

x86_traits.hh

includes: sort includes again

2009-05-17 14:34:52 -07:00

X86LocalApic.py

X86: Make APICs communicate through the memory system.

2008-10-12 13:28:54 -07:00

X86NativeTrace.py

CPU: Separate out native trace into ISA (in)dependent code and SimObjects.

2009-07-19 23:54:56 -07:00

X86System.py

X86: Create SimObjects in python and C++ to represent the ACPI system description tables.

2008-10-10 23:43:33 -07:00

X86TLB.py

tlb: Don't separate the TLB classes into an instruction TLB and a data TLB

2009-04-08 22:21:27 -07:00