X86: Fix minor bug in the page table walker from TLB shuffling.
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@@ -98,7 +98,7 @@ Walker::doNext(PacketPtr &write)
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bool uncacheable = pte.pcd;
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Addr nextRead = 0;
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bool doWrite = false;
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bool badNX = pte.nx && mode == BaseTLB::Write && enableNX;
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bool badNX = pte.nx && mode == BaseTLB::Execute && enableNX;
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switch(state) {
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case LongPML4:
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DPRINTF(PageTableWalker,
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