Ian Jiang 390f7b9177 arch-riscv: Fix disassembling for fence and fence.i ...

The original Gem5 does not give correct disassembly for instruction fence
and fence.i. This patch fixes the problem by adding two bitfields PRED and
SUCC and a new format FenceOp and a template FenceExecute, in which
operands are generated based on PRED and SUCC in the disassembling
function.

Change-Id: I78dbf125fef86ce40785c498a318ffb1569da46c
Signed-off-by: Ian Jiang <ianjiang.ict@gmail.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22569
Reviewed-by: Alec Roelke <alec.roelke@gmail.com>
Maintainer: Alec Roelke <alec.roelke@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2019-11-26 03:38:22 +00:00

..

arch

arch-riscv: Fix disassembling for fence and fence.i

2019-11-26 03:38:22 +00:00

base

tests,base: Added GTests for exec_ecoff.h and exec_aout.h

2019-11-21 23:07:03 +00:00

cpu

arch,cpu: Get rid of ISA_HAS_CC_REGS and its associated ifdefs.

2019-11-26 03:01:32 +00:00

dev

dev-arm: Adjust off_chip ranges in VExpress_GEM5 platform

2019-11-25 22:29:07 +00:00

doc

mem: Minimize the use of MemObject.

2019-04-28 01:19:40 +00:00

doxygen

MEM: Put memory system document into doxygen

2012-09-25 11:49:41 -05:00

gpu-compute

gpu-compute: Fix overriden errors

2019-09-20 22:42:31 +00:00

kern

kern: When dumping dmesg, detect the byte order dynamically.

2019-10-30 22:29:23 +00:00

learning_gem5

mem-ruby: Allow Ruby to use all replacement policies in Classic

2019-10-11 03:29:29 +00:00

mem

mem-cache: Initialize all members of QueuedPrefetcher::DeferredPacket.

2019-11-18 11:10:21 +00:00

proto

cpu: Stop extracting inst_flags from the machInst.

2018-03-27 10:57:36 +00:00

python

base,tests: Expanded GTests for addr_range.hh

2019-11-20 18:39:09 +00:00

sim

sim-se: don't wake up threads that are halted on futex

2019-11-25 12:02:11 +00:00

systemc

systemc: Remove boost dependency caused by tlm

2019-11-07 05:01:20 +00:00

unittest

tests: Added GTests for base/str.cc

2019-10-24 16:25:09 +00:00

Doxyfile

misc: Fix BaseCPU doxygen

2018-07-10 16:41:40 +00:00

SConscript

scons: Use the new error() and warning() methods.

2019-11-21 23:37:03 +00:00