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36e49e2b5bd96d527596707b794fc5f57785c801
gem5/src/mem/protocol
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Tiago Muck 36e49e2b5b mem-ruby: Cache latencies for MOESI_CMP_dir 
Modified both L1 and L2 controllers to take into account the cache
latency parameters. Default values in the configuration script updated
as well.

Change-Id: I72bb8dd29ee0b02da06e1addf13b266fe4d1e979
Signed-off-by: Tiago Muck <tiago.muck@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18414
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2019-05-14 22:01:12 +00:00
..
Garnet_standalone-cache.sm
ruby: Add support for address ranges in the directory
2017-06-13 15:52:32 +00:00
Garnet_standalone-dir.sm
ruby: rename ALPHA_Network_test protocol to Garnet_standalone.
2016-10-06 14:35:14 -04:00
Garnet_standalone-msg.sm
ruby: rename ALPHA_Network_test protocol to Garnet_standalone.
2016-10-06 14:35:14 -04:00
Garnet_standalone.slicc
ruby: rename ALPHA_Network_test protocol to Garnet_standalone.
2016-10-06 14:35:14 -04:00
GPU_RfO-SQC.sm
configs, mem-ruby: fix issues with style in AMD license
2018-04-12 21:45:11 +00:00
GPU_RfO-TCC.sm
configs, mem-ruby: fix issues with style in AMD license
2018-04-12 21:45:11 +00:00
GPU_RfO-TCCdir.sm
configs, mem-ruby: fix issues with style in AMD license
2018-04-12 21:45:11 +00:00
GPU_RfO-TCP.sm
configs, mem-ruby: fix issues with style in AMD license
2018-04-12 21:45:11 +00:00
GPU_RfO.slicc
gpu-compute: AMD's baseline GPU model
2016-01-19 14:28:22 -05:00
GPU_VIPER_Baseline.slicc
gpu-compute: AMD's baseline GPU model
2016-01-19 14:28:22 -05:00
GPU_VIPER_Region-TCC.sm
ruby,gpu-compute: bugfix for GPU_VIPER* protocols
2018-04-13 20:50:10 +00:00
GPU_VIPER_Region.slicc
gpu-compute: AMD's baseline GPU model
2016-01-19 14:28:22 -05:00
GPU_VIPER-SQC.sm
configs, mem-ruby: fix issues with style in AMD license
2018-04-12 21:45:11 +00:00
GPU_VIPER-TCC.sm
ruby,gpu-compute: bugfix for GPU_VIPER* protocols
2018-04-13 20:50:10 +00:00
GPU_VIPER-TCP.sm
configs, mem-ruby: fix issues with style in AMD license
2018-04-12 21:45:11 +00:00
GPU_VIPER.slicc
gpu-compute: AMD's baseline GPU model
2016-01-19 14:28:22 -05:00
MESI_Three_Level-L0cache.sm
mem-ruby: Fixing MESI Three Level
2019-02-12 05:51:07 +00:00
MESI_Three_Level-L1cache.sm
mem-ruby: Fixing MESI Three Level
2019-02-12 05:51:07 +00:00
MESI_Three_Level-msg.sm
mem-ruby: Fixing MESI Three Level
2019-02-12 05:51:07 +00:00
MESI_Three_Level.slicc
ruby: mesi three level: rename incorrectly named files
2014-02-20 17:27:17 -06:00
MESI_Two_Level-dir.sm
mem-ruby: Add support for multiple DMA engines in MESI_Two_Level
2018-01-11 09:40:35 +00:00
MESI_Two_Level-dma.sm
mem-ruby: Add support for multiple DMA engines in MESI_Two_Level
2018-01-11 09:40:35 +00:00
MESI_Two_Level-L1cache.sm
mem-ruby: Fix RubyPrefetcher support in MESI_Two_Level
2018-03-12 12:01:38 +00:00
MESI_Two_Level-L2cache.sm
ruby: Add support for address ranges in the directory
2017-06-13 15:52:32 +00:00
MESI_Two_Level-msg.sm
ruby: replace Address by Addr
2015-08-14 12:04:51 -05:00
MESI_Two_Level.slicc
ruby: rename MESI_CMP_directory to MESI_Two_Level
2014-01-04 00:03:33 -06:00
MI_example-cache.sm
ruby: Add support for address ranges in the directory
2017-06-13 15:52:32 +00:00
MI_example-dir.sm
mem-ruby: Fix missing TBE allocation and deallocation
2019-01-23 00:31:11 +00:00
MI_example-dma.sm
ruby: Add support for address ranges in the directory
2017-06-13 15:52:32 +00:00
MI_example-msg.sm
ruby: replace Address by Addr
2015-08-14 12:04:51 -05:00
MI_example.slicc
Protocol: Remove standard one and two level files
2011-11-03 22:52:02 -05:00
MOESI_AMD_Base-CorePair.sm
mem-ruby: fix more style issues in AMD licenses
2018-04-13 17:32:13 +00:00
MOESI_AMD_Base-dir.sm
mem-ruby: fix more style issues in AMD licenses
2018-04-13 17:32:13 +00:00
MOESI_AMD_Base-L3cache.sm
mem-ruby: fix more style issues in AMD licenses
2018-04-13 17:32:13 +00:00
MOESI_AMD_Base-msg.sm
mem-ruby: fix more style issues in AMD licenses
2018-04-13 17:32:13 +00:00
MOESI_AMD_Base-probeFilter.sm
mem-ruby: fix more style issues in AMD licenses
2018-04-13 17:32:13 +00:00
MOESI_AMD_Base-Region-CorePair.sm
mem-ruby: fix more style issues in AMD licenses
2018-04-13 17:32:13 +00:00
MOESI_AMD_Base-Region-dir.sm
ruby,gpu-compute: bugfix for GPU_VIPER* protocols
2018-04-13 20:50:10 +00:00
MOESI_AMD_Base-Region-msg.sm
mem-ruby: fix more style issues in AMD licenses
2018-04-13 17:32:13 +00:00
MOESI_AMD_Base-RegionBuffer.sm
mem-ruby: fix more style issues in AMD licenses
2018-04-13 17:32:13 +00:00
MOESI_AMD_Base-RegionDir.sm
mem-ruby: fix more style issues in AMD licenses
2018-04-13 17:32:13 +00:00
MOESI_AMD_Base.slicc
gpu-compute: AMD's baseline GPU model
2016-01-19 14:28:22 -05:00
MOESI_CMP_directory-dir.sm
mem-ruby: Unique ranks for MOESI_CMP_dir in ports
2019-05-14 22:01:12 +00:00
MOESI_CMP_directory-dma.sm
mem-ruby: Unique ranks for MOESI_CMP_dir in ports
2019-05-14 22:01:12 +00:00
MOESI_CMP_directory-L1cache.sm
mem-ruby: Cache latencies for MOESI_CMP_dir
2019-05-14 22:01:12 +00:00
MOESI_CMP_directory-L2cache.sm
mem-ruby: Cache latencies for MOESI_CMP_dir
2019-05-14 22:01:12 +00:00
MOESI_CMP_directory-msg.sm
mem-ruby: Prevent response stalls on MOESI_CMP_directory
2019-05-14 22:01:12 +00:00
MOESI_CMP_directory.slicc
ruby: record fully busy cycle with in the controller
2013-02-10 21:26:22 -06:00
MOESI_CMP_token-dir.sm
mem-ruby: Fix wakeup timeouts for the MOESI_CMP_token protocol
2018-01-11 09:40:35 +00:00
MOESI_CMP_token-dma.sm
ruby: Add support for address ranges in the directory
2017-06-13 15:52:32 +00:00
MOESI_CMP_token-L1cache.sm
ruby: Add support for address ranges in the directory
2017-06-13 15:52:32 +00:00
MOESI_CMP_token-L2cache.sm
ruby: Add support for address ranges in the directory
2017-06-13 15:52:32 +00:00
MOESI_CMP_token-msg.sm
ruby: replace Address by Addr
2015-08-14 12:04:51 -05:00
MOESI_CMP_token.slicc
Protocol: Remove standard one and two level files
2011-11-03 22:52:02 -05:00
MOESI_hammer-cache.sm
ruby: Add support for address ranges in the directory
2017-06-13 15:52:32 +00:00
MOESI_hammer-dir.sm
ruby: slicc: have a static MachineType
2015-07-20 09:15:18 -05:00
MOESI_hammer-dma.sm
ruby: Add support for address ranges in the directory
2017-06-13 15:52:32 +00:00
MOESI_hammer-msg.sm
ruby: replace Address by Addr
2015-08-14 12:04:51 -05:00
MOESI_hammer.slicc
Protocol: Remove standard one and two level files
2011-11-03 22:52:02 -05:00
RubySlicc_ComponentMapping.sm
mem-ruby: Remove function that maps responses to a DMA engine
2018-01-11 09:40:35 +00:00
RubySlicc_Defines.sm
ruby: message buffer, timer table: significant changes
2015-09-16 11:59:56 -05:00
RubySlicc_Exports.sm
ruby: bugfix for MESI_Three_Level protocol
2018-04-13 20:49:27 +00:00
RubySlicc_interfaces.slicc
ruby: remove the three files related to profiling
2013-06-24 08:59:08 -05:00
RubySlicc_MemControl.sm
ruby: replace Address by Addr
2015-08-14 12:04:51 -05:00
RubySlicc_Types.sm
ruby: Allow multiple outstanding DMA requests
2016-10-26 22:48:37 -04:00
RubySlicc_Util.sm
slicc: fixes for the Address to Addr changeset (11025)
2015-11-13 17:30:58 -05:00
SConscript
scons: Move Transform and termcap functionality into their own files.
2017-11-10 13:17:29 +00:00
SConsopts
ruby: rename ALPHA_Network_test protocol to Garnet_standalone.
2016-10-06 14:35:14 -04:00