Mitch Hayenga 8f95144e16 arm: Make memory ops work on 64bit/128-bit quantities ...

Multiple instructions assume only 32-bit load operations are available,
this patch increases load sizes to 64-bit or 128-bit for many load pair and
load multiple instructions.

2014-09-03 07:42:52 -04:00

..

alpha

arch: Cleanup unused ISA traits constants

2014-09-03 07:42:21 -04:00

arm

arm: Make memory ops work on 64bit/128-bit quantities

2014-09-03 07:42:52 -04:00

generic

base: Replace the internal varargs stuff with C++11 constructs

2014-08-26 10:13:45 -04:00

mips

arch: Cleanup unused ISA traits constants

2014-09-03 07:42:21 -04:00

null

arch: Cleanup unused ISA traits constants

2014-09-03 07:42:21 -04:00

power

arch: Cleanup unused ISA traits constants

2014-09-03 07:42:21 -04:00

sparc

arch: Cleanup unused ISA traits constants

2014-09-03 07:42:21 -04:00

x86

x86: Flag instructions that call suspend as IsQuiesce

2014-09-03 07:42:46 -04:00

isa_parser.py

arch: Properly guess OpClass from optional StaticInst flags

2014-09-03 07:42:32 -04:00

micro_asm_test.py

Add a second section to make sure the ROM is extended properly.

2007-05-31 22:21:21 +00:00

micro_asm.py

scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access

2009-09-22 15:24:16 -07:00

SConscript

arch, cpu: Factor out the ExecContext into a proper base class

2014-09-03 07:42:22 -04:00