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gem5/src/cpu/o3
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Giacomo Travaglini 2fc4a0803d cpu, fastmodel: Remove the old getDTBPtr/getITBPtr virtual methods 
JIRA: https://gem5.atlassian.net/browse/GEM5-790

Change-Id: I6c6cdeaa3ae1433624e4e5b30b031d49e822f0e0
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34984
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
2020-11-03 09:54:44 +00:00
..
probe
misc: Delete the now unnecessary create methods.
2020-10-30 04:00:20 +00:00
base_dyn_inst.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
checker.cc
misc: Delete the now unnecessary create methods.
2020-10-30 04:00:20 +00:00
checker.hh
misc: Delete the now unnecessary create methods.
2020-10-30 04:00:20 +00:00
comm.hh
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
commit_impl.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
commit.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
commit.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
cpu_policy.hh
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
cpu.cc
misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB
2020-10-21 09:33:39 +00:00
cpu.hh
cpu: Remove unused demapInstPage and demapDataPage
2020-10-21 09:33:39 +00:00
decode_impl.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
decode.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
decode.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
dep_graph.hh
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
deriv.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
dyn_inst_impl.hh
arch,cpu,sim: Route system calls through the workload.
2020-09-20 07:26:42 +00:00
dyn_inst.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
dyn_inst.hh
arch,cpu,sim: Route system calls through the workload.
2020-09-20 07:26:42 +00:00
fetch_impl.hh
misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB
2020-10-21 09:33:39 +00:00
fetch.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
fetch.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
free_list.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
free_list.hh
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
fu_pool.cc
misc: Delete the now unnecessary create methods.
2020-10-30 04:00:20 +00:00
fu_pool.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
FuncUnitConfig.py
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
FUPool.py
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
iew_impl.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
iew.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
iew.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
impl.hh
misc: Clean up usage of arch/isa_traits.hh.
2020-08-28 07:20:58 +00:00
inst_queue_impl.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
inst_queue.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
inst_queue.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
isa_specific.hh
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
lsq_impl.hh
misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB
2020-10-21 09:33:39 +00:00
lsq_unit_impl.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
lsq_unit.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
lsq_unit.hh
misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB
2020-10-21 09:33:39 +00:00
lsq.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
lsq.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
mem_dep_unit_impl.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
mem_dep_unit.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
mem_dep_unit.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
O3Checker.py
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
O3CPU.py
misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB
2020-10-21 09:33:39 +00:00
regfile.cc
cpu: Get rid of auto return types in the PhysRegFile.
2020-07-03 21:28:19 +00:00
regfile.hh
misc: Clean up usage of arch/isa_traits.hh.
2020-08-28 07:20:58 +00:00
rename_impl.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
rename_map.cc
cpu-o3: Fix corrupted rename map in vector mode switching
2020-03-03 00:54:50 +00:00
rename_map.hh
cpu: Some cleanups in the O3 rename map.
2020-07-03 21:28:27 +00:00
rename.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
rename.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
rob_impl.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
rob.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
rob.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
SConscript
misc: Delete the now unnecessary create methods.
2020-10-30 04:00:20 +00:00
SConsopts
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
scoreboard.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
scoreboard.hh
misc: Update attribute syntax, and reorganize compiler.hh.
2020-09-28 21:52:59 +00:00
store_set.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
store_set.hh
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
thread_context_impl.hh
cpu: Allow storing an invalid HTM checkpoint
2020-09-29 09:16:28 +00:00
thread_context.cc
cpu: Delete authors lists from the cpu directory.
2020-02-17 21:51:23 +00:00
thread_context.hh
cpu, fastmodel: Remove the old getDTBPtr/getITBPtr virtual methods
2020-11-03 09:54:44 +00:00
thread_state.hh
arch,cpu,sim: Route system calls through the workload.
2020-09-20 07:26:42 +00:00