951650156c
Nothing is actually accessed through these pointers. This simplifies their declration, and gives more flexibility when setting up those events. Change-Id: If857de5c8df37b6ead7eae53e3c0c6c3103938c0 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24112 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
108 lines
4.0 KiB
C++
108 lines
4.0 KiB
C++
/*
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* Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by the University of Cambridge Computer
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* Laboratory as part of the CTSRD Project, with support from the UK Higher
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* Education Innovation Fund (HEIF).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_ARM_FREEBSD_FS_WORKLOAD_HH__
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#define __ARCH_ARM_FREEBSD_FS_WORKLOAD_HH__
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#include <map>
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#include "arch/arm/fs_workload.hh"
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#include "kern/freebsd/events.hh"
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#include "params/ArmFsFreebsd.hh"
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namespace ArmISA
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{
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class FsFreebsd : public ArmISA::FsWorkload
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{
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public:
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/** Boilerplate params code */
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typedef ArmFsFreebsdParams Params;
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const Params *
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params() const
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{
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return dynamic_cast<const Params *>(&_params);
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}
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/** When enabled, dump stats/task info on context switches for
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* Streamline and per-thread cache occupancy studies, etc. */
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bool enableContextSwitchStatsDump;
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/** This map stores a mapping of OS process IDs to internal Task IDs. The
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* mapping is done because the stats system doesn't tend to like vectors
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* that are much greater than 1000 items and the entire process space is
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* 65K. */
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std::map<uint32_t, uint32_t> taskMap;
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/** This is a file that is placed in the run directory that prints out
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* mappings between taskIds and OS process IDs */
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std::ostream* taskFile;
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FsFreebsd(Params *p);
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~FsFreebsd();
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void initState() override;
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/** This function creates a new task Id for the given pid.
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* @param tc thread context that is currentyl executing */
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void mapPid(ThreadContext* tc, uint32_t pid);
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private:
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/** Event to halt the simulator if the kernel calls panic() */
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PCEvent *kernelPanic = nullptr;
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/** Event to halt the simulator if the kernel calls oopses */
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PCEvent *kernelOops = nullptr;
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/**
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* PC based event to skip udelay(<time>) calls and quiesce the
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* processor for the appropriate amount of time. This is not functionally
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* required but does speed up simulation.
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*/
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PCEvent *skipUDelay = nullptr;
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/** These variables store addresses of important data structures
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* that are normaly kept coherent at boot with cache mainetence operations.
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* Since these operations aren't supported in gem5, we keep them coherent
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* by making them uncacheable until all processors in the system boot.
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*/
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Addr secDataPtrAddr;
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Addr secDataAddr;
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Addr penReleaseAddr;
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Addr pen64ReleaseAddr;
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Addr bootReleaseAddr;
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};
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} // namespace ArmISA
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#endif // __ARCH_ARM_FREEBSD_FS_WORKLOAD_HH__
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