Ciro Santilli 2c242d665f arch-arm: implement floating point aarch32 VCVTA family ...

These instructions round floating point to integer, and were added to
aarch32 as an extension to ARMv7.

Change-Id: I62d1705badc95a4e8954a5ad62b2b6bc9e4ffe00
Reviewed-on: https://gem5-review.googlesource.com/c/16788
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

2019-03-01 09:37:20 +00:00

..

arch

arch-arm: implement floating point aarch32 VCVTA family

2019-03-01 09:37:20 +00:00

base

base: Fix enums checkpointing

2019-02-18 09:57:33 +00:00

cpu

misc: Segmentation Fault during O3PipeView execution

2019-02-27 18:12:13 +00:00

dev

dev-arm: LPI support for GICv3. This doesn't include an ITS model.

2019-02-18 11:45:24 +00:00

doc

docs: Fix power model doxygen

2018-04-20 15:59:35 +00:00

doxygen

MEM: Put memory system document into doxygen

2012-09-25 11:49:41 -05:00

gpu-compute

python: Don't assume SimObjects live in the global namespace

2019-02-12 09:43:00 +00:00

kern

kern,sim: implement FUTEX_WAKE_OP

2019-02-08 15:25:30 +00:00

learning_gem5

python: Don't assume SimObjects live in the global namespace

2019-02-12 09:43:00 +00:00

mem

ruby: Fix garnet's round robin arbitration for vc selection

2019-02-28 19:46:58 +00:00

proto

cpu: Stop extracting inst_flags from the machInst.

2018-03-27 10:57:36 +00:00

python

scons: Marshal Python sources using the same Python as gem5

2019-02-26 10:27:07 +00:00

sim

sim: Add a mechanism to exit the simulation loop immediately.

2019-02-19 23:34:05 +00:00

systemc

systemc: Move systemc disabling checks to SConsopts.

2019-02-28 22:29:36 +00:00

unittest

python: Replace dict.has_key with 'key in dict'

2019-02-12 17:36:12 +00:00

Doxyfile

misc: Fix BaseCPU doxygen

2018-07-10 16:41:40 +00:00

SConscript

scons: Marshal Python sources using the same Python as gem5

2019-02-26 10:27:07 +00:00