Jason Lowe-Power 21df40497c cpu: Set ContextId on request from trace CPU ...

Adds a contextId to the trace CPU in one more case that was missing.
Without this a panic is triggered in the cache.

Change-Id: I78bd70ad1e3657c9a6a1d56c234c007c2e2b586c
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34035
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>

2020-09-04 18:48:27 +00:00

..

arch

arch: Use a fault to trigger system calls in SE mode.

2020-09-03 10:07:15 +00:00

base

ext: Revert "base: Use system libelf instead of ext"

2020-09-02 20:36:14 +00:00

cpu

cpu: Set ContextId on request from trace CPU

2020-09-04 18:48:27 +00:00

dev

arch-gcn3: Added missing header to hsa_driver.cc

2020-09-01 18:52:13 +00:00

doc

misc: Removed unneeded Doxygen pages

2020-04-25 01:08:38 +00:00

doxygen

misc,sim: Tagged API methods in sim/simobject.hh

2020-05-19 21:58:24 +00:00

gpu-compute

misc: Use VPtr in hsa_driver.cc

2020-08-31 17:44:11 +00:00

kern

misc: Clean up usage of arch/isa_traits.hh.

2020-08-28 07:20:58 +00:00

learning_gem5

learning-gem5: update port terminology

2020-08-26 16:48:13 +00:00

mem

mem,ext: Integrating DRAMSim3 with gem5

2020-09-02 15:51:00 +00:00

proto

misc: Use the protobuf version to choose between ByteSize(Long).

2020-04-29 21:46:11 +00:00

python

python: Add support for introspecting scalar stats

2020-08-28 09:27:58 +00:00

sim

arch: Use a fault to trigger system calls in SE mode.

2020-09-03 10:07:15 +00:00

systemc

systemc: Send response to TLM side if a packet does not need response

2020-08-27 00:15:26 +00:00

unittest

base: Make the Value stat's functor method accept lambdas.

2020-09-01 21:57:34 +00:00

Doxyfile

misc: Reverting version numbers

2020-07-03 20:59:44 -07:00

SConscript

scons: Make scons aware of changes to cxx_type in param types.

2020-09-01 21:55:50 +00:00