Gabe Black 27c262735c arm: Set the number of FloatRegs to zero. ...

ARM no longer uses the floating point register file and uses the
vector registers instead. This avoids checkpointing a bunch of unused
registers, making it hard to tell where floating point instructions
are keeping their values, etc.

Change-Id: I23145ba750f1dd9ff5b815395e073c410120840d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22524
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2019-11-07 22:50:22 +00:00

..

alpha

arch,cpu: Move endianness conversion of inst bytes into the ISA.

2019-11-02 00:01:52 +00:00

arm

arm: Set the number of FloatRegs to zero.

2019-11-07 22:50:22 +00:00

generic

arch: Make a base class for Interrupts.

2019-10-19 01:45:48 +00:00

hsail

arch-hsail: changed gen.py shebang from python(3) to python2.7

2019-03-11 22:13:24 +00:00

mips

mips: Replace gtoh and htog with letoh and htole.

2019-11-07 11:02:46 +00:00

null

cpu, arch: Replace the CCReg type with RegVal.

2019-02-01 01:22:19 +00:00

power

power: Replace gtoh and htog with betoh and htobe.

2019-11-07 11:02:46 +00:00

riscv

arch,cpu: Move endianness conversion of inst bytes into the ISA.

2019-11-02 00:01:52 +00:00

sparc

sparc: Replace htog and gtoh with htobe and betoh.

2019-11-07 11:02:46 +00:00

x86

x86: Replace htog and gtoh with htole and letoh.

2019-11-07 11:02:46 +00:00

isa_parser.py

arch: Add include guards to auto-gen. decode header

2019-05-30 15:56:17 +00:00

micro_asm_test.py

scons: Switch from the print statement to the print function.

2018-03-06 23:39:01 +00:00

micro_asm.py

scons: Switch from the print statement to the print function.

2018-03-06 23:39:01 +00:00

SConscript

arch: Remove the "interrupts.hh" switching header file.

2019-10-19 01:46:00 +00:00