Mitch Hayenga 23c8540756 config: Change parsing of Addr so hex values work from scripts ...

When passed from a configuration script with a hexadecimal value (like
"0x80000000"), gem5 would error out. This is because it would call
"toMemorySize" which requires the argument to end with a size specifier (like
1MB, etc).

This modification makes it so raw hex values can be passed through Addr
parameters from the configuration scripts.

2014-09-03 07:42:20 -04:00

..

insts

arm: Add branch flags onto macroops

2014-05-09 18:58:47 -04:00

isa

arm: Make sure UndefinedInstructions are properly initialized

2014-04-17 16:56:09 -05:00

linux

sim, arm: implement more of the at variety syscalls

2014-04-17 16:55:05 -05:00

ArmInterrupts.py

sim: Include object header files in SWIG interfaces

2012-11-02 11:32:01 -05:00

ArmISA.py

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

ArmNativeTrace.py

sim: Include object header files in SWIG interfaces

2012-11-02 11:32:01 -05:00

ArmSystem.py

config: Change parsing of Addr so hex values work from scripts

2014-09-03 07:42:20 -04:00

ArmTLB.py

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

decoder.cc

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

decoder.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

faults.cc

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

faults.hh

arm: Make sure UndefinedInstructions are properly initialized

2014-04-17 16:56:09 -05:00

interrupts.cc

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

interrupts.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

intregs.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

isa_traits.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

isa.cc

arm: allow DC instructions by default so SE mode works

2014-04-17 16:55:54 -05:00

isa.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

kernel_stats.hh

Make commenting on close namespace brackets consistent.

2011-01-03 14:35:43 -08:00

locked_mem.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

microcode_rom.hh

arm: include missing file for arm

2009-04-21 15:40:26 -07:00

miscregs.cc

arm: change MISCREG_L2ERRSR to warn not fail

2014-08-13 06:57:36 -04:00

miscregs.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

mmapped_ipr.hh

arch: Add support for m5ops using mmapped IPRs

2013-09-30 12:20:43 +02:00

nativetrace.cc

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

nativetrace.hh

ARM: Add vfpv3 support to native trace.

2011-05-04 20:38:26 -05:00

pagetable.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

process.cc

syscall emulation: clean up & comment SyscallReturn

2014-05-12 14:23:31 -07:00

process.hh

mem: adding architectural page table support for SE mode

2014-08-28 10:11:44 -05:00

registers.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

remote_gdb.cc

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

remote_gdb.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

SConscript

arch: teach ISA parser how to split code across files

2014-05-09 18:58:47 -04:00

SConsopts

arm: add ARM support to M5

2009-04-05 18:53:15 -07:00

stacktrace.cc

ARM: implement the ProcessInfo methods

2012-06-11 11:07:41 -04:00

stacktrace.hh

trace: reimplement the DTRACE function so it doesn't use a vector

2011-04-15 10:44:32 -07:00

stage2_lookup.cc

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

stage2_lookup.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

stage2_mmu.cc

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

stage2_mmu.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

system.cc

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

system.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

table_walker.cc

arm: Handle functional TLB walks properly

2014-03-07 15:56:23 -05:00

table_walker.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

tlb.cc

arch, arm: Preserve TLB bootUncacheability when switching CPUs

2014-05-09 18:58:47 -04:00

tlb.hh

arch, arm: Preserve TLB bootUncacheability when switching CPUs

2014-05-09 18:58:47 -04:00

types.hh

arm: Fix ExtMachInst hash operator underlying type

2014-09-03 07:42:19 -04:00

utility.cc

cpu, arm: Allow the specification of a socket field

2014-05-09 18:58:46 -04:00

utility.hh

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

vtophys.cc

arm: Add support for ARMv8 (AArch64 & AArch32)

2014-01-24 15:29:34 -06:00

vtophys.hh

gcc: Clean-up of non-C++0x compliant code, first steps

2012-03-19 06:36:09 -04:00