Files
gem5/src
Debjyoti Bhattacharjee ec690de0da arch-riscv: This commit fixes bug in vfmv.f.s impl. in riscv (#863)
The existing implementation of vfmv instruction did not type cast the
first element of the source vector, which caused the "freg" to interpret
the result as a NaN.

With the type cast to f32, the value is correctly recognized as float
and sign extended to be stored in the fd register.

Git issue: https://github.com/gem5/gem5/issues/827

Change-Id: Ibe9873910827594c0ec11cb51ac0438428c3b54e

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Co-authored-by: Debjyoti B <bhatta53@imec.be>
Co-authored-by: Tommaso Marinelli <tommarin@ucm.es>
2024-03-29 08:23:14 -07:00
..
2024-01-23 11:35:54 -08:00