Giacomo Travaglini 05f93175a7 arch-arm: Crypto instruction execution requires SIMD to be enabled (#848) ...

Crypto instructions will cause an undefined instruction when executed
with SIMD disabled. The PR is also
refactoring their implementation by checking the release object instead
of the ID register field. This is improving
readability

2024-02-05 19:22:04 +00:00

..

arch

arch-arm: Crypto instruction execution requires SIMD to be enabled (#848)

2024-02-05 19:22:04 +00:00

base

base: Add a check for edge case

2024-01-23 11:35:54 -08:00

cpu

cpu,stdlib: Updating strided generator (#762)

2024-02-01 09:08:42 -08:00

dev

dev: Fix off-by-one in IDE controller PCI register allocation (#824)

2024-02-01 10:14:28 -08:00

doc

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doxygen

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gpu-compute

misc: Remove all references to GCN3

2024-01-17 11:11:06 -06:00

kern

misc: Fix 'maybe-uninitialized' warn turn off (#706)

2023-12-21 18:45:56 -08:00

learning_gem5

misc: Run pre-commit run --all-files

2023-11-29 22:06:41 -08:00

mem

arch-gcn3: Remove gcn3 (#781)

2024-01-25 10:14:46 -08:00

proto

scons: Use Kconfig to configure gem5.

2023-11-23 08:26:10 +08:00

python

cpu,stdlib: Updating strided generator (#762)

2024-02-01 09:08:42 -08:00

sim

sim: Remove trailing / from proc/meminfo special path (#689)

2023-12-18 17:28:10 -08:00

sst

mem,arch-arm,mem-ruby,cpu: Remove use of deprecated base port owner

2023-02-03 06:11:45 +00:00

systemc

systemc: Reduce unnecessary backdoor request in atomic transaction (#795)

2024-02-05 11:08:20 -08:00

Doxyfile

misc: Change version information to develop for v24.0

2023-12-27 12:29:52 -08:00

Kconfig

scons: Add new config option HAVE_CAPSTONE to Kconfig

2023-11-23 08:26:11 +08:00

SConscript

python: Add importer to standalone gem5py_m5

2023-09-28 11:22:33 -07:00