afee6296b5
The upgraders in util/cpt_upgraders have been able to check the root.isa element of checkpoints to determine what "the" ISA is for a simulation, as a quick way to bail out of that particular updater applies only to specific ISAs. We are moving away from the idea that there is a single ISA, and so this mechanism will no longer work. Fortunately, these cpt_upgraders are only relevant for old checkpoints. If a checkpoint doesn't have a root.isa element inside it at all, we know (as of this writing) that it is newer than all of these upgraders and hence they do not apply. Any new upgraders will have to be written to not rely on the root.isa field which will be removed. If that sort of field is still needed, it can be added somewhere else in the hierarchy, perhaps at the system level, or as part of the actual ISA object. The simplest way to implement this new behavior is to add a fallback option when an upgrader looks for root.isa, specifically ''. If the root.isa element does not exist, the script will get '' back, and this will not match whatever ISA it's trying to check against. The one even remotely more complicated script is isa-is-simobject.py which has several behaviors for different ISAs. In that case, we just explicitly check for '' and return early if that's what we found. Jira Issue: https://gem5.atlassian.net/browse/GEM5-1056 Change-Id: Ie78deccb2bac51f38224e62a28dd733cefd63ed7 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48883 Maintainer: Gabe Black <gabe.black@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
73 lines
4.0 KiB
Python
73 lines
4.0 KiB
Python
# Copyright (c) 2016 ARM Limited
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# All rights reserved
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# reflect updated register mappings for ARM ISA
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def upgrader(cpt):
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if cpt.get('root', 'isa', fallback='') == 'arm':
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for sec in cpt.sections():
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import re
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# Search for all ISA sections
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if re.search('.*sys.*\.cpu.*\.isa\d*$', sec):
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mr = cpt.get(sec, 'miscRegs').split()
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if int(mr[0]) & 16 == 0: # CPSR reg width; 0 for AArch64
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mr[112] = mr[111] # ACTLR_NS = ACTLR
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mr[146] = mr[145] # ADFSR_NS = ADFSR
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mr[149] = mr[148] # AIFSR_NS = AIFSR
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mr[253] = mr[252] # AMAIR0_NS = AMAIR0
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mr[289] = mr[288] # CNTP_CTL_NS = CNTP_CTL
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mr[313] = mr[312] # CNTP_CVAL_NS = CNTP_CVAL
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mr[286] = mr[285] # CNTP_TVAL_NS = CNTP_TVAL
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mr[271] = mr[270] # CONTEXTIDR_NS = CONTEXTIDR
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mr[104] = mr[103] # CSSELR_NS = CSSELR
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mr[137] = mr[136] # DACR_NS = DACR
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mr[155] = mr[154] # DFAR_NS = DFAR
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mr[158] = mr[157] # IFAR_NS = IFAR
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mr[143] = mr[142] # IFSR_NS = IFSR
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mr[247] = mr[246] # NMRR_NS = NMRR
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mr[166] = mr[165] # PAR_NS = PAR
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mr[241] = mr[240] # PRRR_NS = PRRR
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mr[ 4] = mr[424] # SPSR_SVC = SPSR_EL1
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mr[ 7] = mr[435] # SPSR_HYP = SPSR_EL2
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mr[ 5] = mr[442] # SPSR_MON = SPSR_EL3
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mr[277] = mr[276] # TPIDRURO_NS = TPIDRURO
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mr[280] = mr[279] # TPIDRPRW_NS = TPIDRPRW
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mr[274] = mr[273] # TPIDRURW_NS = TPIDRURW
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mr[132] = mr[131] # TTBCR_NS = TTBCR
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mr[126] = mr[125] # TTBR0_NS = TTBR0
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mr[129] = mr[128] # TTBR1_NS = TTBR1
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mr[263] = mr[262] # VBAR_NS = VBAR
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cpt.set(sec, 'miscRegs', ' '.join(str(x) for x in mr))
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