afee6296b5
The upgraders in util/cpt_upgraders have been able to check the root.isa element of checkpoints to determine what "the" ISA is for a simulation, as a quick way to bail out of that particular updater applies only to specific ISAs. We are moving away from the idea that there is a single ISA, and so this mechanism will no longer work. Fortunately, these cpt_upgraders are only relevant for old checkpoints. If a checkpoint doesn't have a root.isa element inside it at all, we know (as of this writing) that it is newer than all of these upgraders and hence they do not apply. Any new upgraders will have to be written to not rely on the root.isa field which will be removed. If that sort of field is still needed, it can be added somewhere else in the hierarchy, perhaps at the system level, or as part of the actual ISA object. The simplest way to implement this new behavior is to add a fallback option when an upgrader looks for root.isa, specifically ''. If the root.isa element does not exist, the script will get '' back, and this will not match whatever ISA it's trying to check against. The one even remotely more complicated script is isa-is-simobject.py which has several behaviors for different ISAs. In that case, we just explicitly check for '' and return early if that's what we found. Jira Issue: https://gem5.atlassian.net/browse/GEM5-1056 Change-Id: Ie78deccb2bac51f38224e62a28dd733cefd63ed7 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48883 Maintainer: Gabe Black <gabe.black@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
29 lines
991 B
Python
29 lines
991 B
Python
# Use condition code registers for the ARM architecture.
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# Previously the integer register file was used for these registers.
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def upgrader(cpt):
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if cpt.get('root', 'isa', fallback='') == 'arm':
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for sec in cpt.sections():
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import re
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re_cpu_match = re.match('^(.*sys.*\.cpu[^.]*)\.xc\.(.+)$', sec)
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# Search for all the execution contexts
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if not re_cpu_match:
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continue
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items = []
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for (item,value) in cpt.items(sec):
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items.append(item)
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if 'ccRegs' not in items:
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intRegs = cpt.get(sec, 'intRegs').split()
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# Move those 5 integer registers to the ccRegs register file
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ccRegs = intRegs[38:43]
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del intRegs[38:43]
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ccRegs.append('0') # CCREG_ZERO
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cpt.set(sec, 'intRegs', ' '.join(intRegs))
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cpt.set(sec, 'ccRegs', ' '.join(ccRegs))
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legacy_version = 13
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