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  • 3964709711 ARM: Adjust simplify rotate_imm slightly. Gabe Black 2009-06-21 09:38:54 -07:00
  • c20ce20e4c ARM: Make the isa parser aware that CPSR is being used. Gabe Black 2009-06-21 09:37:41 -07:00
  • 71e0d1ded2 ARM: Pull some static code out of the isa desc and create miscregs.hh. Gabe Black 2009-06-21 09:21:07 -07:00
  • 19a1966079 ARM: Get rid of unused postacc_code. Gabe Black 2009-06-21 09:16:55 -07:00
  • e1eacc8d92 scons: Make shared library builds work again Compile gzstream as position independent code use the PIC version of date for shared libs...oops Nathan Binkert 2009-06-12 21:19:16 -07:00
  • d3d8a5a83b copyright: I missed some copyrights during ruby integration Nathan Binkert 2009-06-10 00:41:56 -07:00
  • 85ca502611 ARM: Add a hello world regression. Gabe Black 2009-06-09 23:55:53 -07:00
  • d91a3cf53d ARM: Add a hello world binary. Gabe Black 2009-06-09 23:42:43 -07:00
  • b394242240 ARM: Hook in the mmap2 system call. Make ArmLinuxProcess handle 5,6 syscall params. Gabe Black 2009-06-09 23:41:45 -07:00
  • c913c64be2 ARM: Add a memory_barrier function to the "comm page". This function doesn't actually provide a memory barrier (I don't think they're implemented) and instead just returns. Gabe Black 2009-06-09 23:41:35 -07:00
  • 3ff1e922c2 ARM: Add a cmpxchg implementation to the "comm page". This implementation does what it's supposed to (I think), but it's not atomic and doesn't have memory barriers like the kernel's version. Gabe Black 2009-06-09 23:41:03 -07:00
  • 37ac2871d5 ARM: Implement TLS. This is not tested. Gabe Black 2009-06-09 23:39:07 -07:00
  • 5daeefc505 ARM: Make ArmLinuxProcess understand "ARM private" system calls. Gabe Black 2009-06-09 23:38:50 -07:00
  • fbf4dc9da2 ARM: Update the kernel version M5 reports to 2.6.16.19 Gabe Black 2009-06-09 23:37:41 -07:00
  • baa0d695b2 cleanup: Make use of types properly and make the loop a little more clear. Nathan Binkert 2009-06-05 17:01:19 -07:00
  • c76a8b1c15 scons: Make it so that the processing of trace flags does not depend on order Nathan Binkert 2009-06-05 15:20:09 -07:00
  • a01437ab03 types: need typename keyword to get the type. Nathan Binkert 2009-06-05 11:40:02 -07:00
  • 6faf377b53 types: clean up types, especially signed vs unsigned Nathan Binkert 2009-06-04 23:21:12 -07:00
  • 4e34266245 move: put predictor includes and cc files into the same place Nathan Binkert 2009-06-04 21:50:20 -07:00
  • e30c62ad99 style: cleanup style Nathan Binkert 2009-06-04 21:41:46 -07:00
  • b08c361911 swig: %include Event before PythonEvent so python gets the subclass correct. Before this change, some versions of swig would cause PythonEvent to be derived from object instead of Event Nathan Binkert 2009-06-01 16:38:57 -07:00
  • a0104b6ff6 request: add accessor and constructor for setting time other than curTick Nathan Binkert 2009-05-29 15:30:16 -07:00
  • 7f50ea05ac X86: Keep track of more descriptor state to accomodate KVM. Gabe Black 2009-05-28 23:27:56 -07:00
  • 47877cf2db types: add a type for thread IDs and try to use it everywhere Nathan Binkert 2009-05-26 09:23:13 -07:00
  • d93392df28 X86: Really set up the GDT and various hidden/visible segment registers. Gabe Black 2009-05-26 02:23:08 -07:00
  • 6566028801 util: mkblankimage.sh should be executable Steve Reinhardt 2009-05-22 21:24:09 -07:00
  • 107cf2ed52 build_opts: update ALPHA_FS cpu models Korey Sewell 2009-05-21 11:04:24 -04:00
  • b3d0a01eb3 igbe: Fix descriptor cache bug. Steve Reinhardt 2009-05-20 21:52:32 -07:00
  • 8d2e51c7f5 includes: sort includes again Nathan Binkert 2009-05-17 14:34:52 -07:00
  • 709d859530 includes: use base/types.hh not inttypes.h or stdint.h Nathan Binkert 2009-05-17 14:34:51 -07:00
  • eef3a2e142 types: Move stuff for global types into src/base/types.hh Nathan Binkert 2009-05-17 14:34:50 -07:00
  • cbf237897f stats: tidy up the Distribution type a little bit Nathan Binkert 2009-05-13 07:18:03 -07:00
  • cfa9c78100 stats: fancy is a bad name Nathan Binkert 2009-05-13 07:18:02 -07:00
  • 74c595d739 stats: clean up the code for printing stats Nathan Binkert 2009-05-13 07:18:01 -07:00
  • 97a04b16eb mips-merge: merge hello world regress for inorder cpu w/latest changes Korey Sewell 2009-05-13 02:02:05 -04:00
  • c94944e257 inorder-regress: add hello MIPS_SE Korey Sewell 2009-05-13 01:55:04 -04:00
  • 5207586b26 ruby: deal with printf warnings and convert some to cprintf Nathan Binkert 2009-05-12 22:33:05 -07:00
  • 016d472c46 ruby: remove random uint typedef and use unsigned Nathan Binkert 2009-05-12 22:33:05 -07:00
  • 7389dc63b2 ruby: Make ruby's Map use hashmap.hh to simplify things. Nathan Binkert 2009-05-12 22:33:05 -07:00
  • 82c9e6a5fc gcc: work around a bogus gcc error Nathan Binkert 2009-05-12 22:33:05 -07:00
  • 0c2b9cf90d slicc: work around improper initialization of a global in slicc. Nathan Binkert 2009-05-12 22:33:05 -07:00
  • d923ce0f8c slicc: clean up the slicc environment so things build properly on mac. Nathan Binkert 2009-05-12 22:33:04 -07:00
  • 2452d6b6a3 mips_se: add cpu_models to build options Korey Sewell 2009-05-13 01:26:47 -04:00
  • 1f4c954590 inorder-mips: Remove eaComp & memAcc; use 'visible' eaComp Inorder expects eaComp to be visible through StaticInst object. This mirrors a similar change to ALPHA... Needs to be done for SPARC and whatever other ISAs want to use InOrderCPU Korey Sewell 2009-05-13 01:26:46 -04:00
  • bc69e7947c arch-mips: add regWidth constant to float regfile Korey Sewell 2009-05-13 01:26:38 -04:00
  • a032d91016 cpus: add InOrderCPU to default build regressions need this so they build the model Korey Sewell 2009-05-12 20:55:21 -04:00
  • 373e55c7b9 inorder-regress: missing regress config file regressions need to access this file to setup the InOrderCPU object Korey Sewell 2009-05-12 20:30:40 -04:00
  • 5d810c30e6 alpha-isa: add mt.hh so it can compile with inorder Korey Sewell 2009-05-12 20:18:34 -04:00
  • b5959124e1 inorder-regress: add vortex ALPHA_SE Korey Sewell 2009-05-12 15:01:17 -04:00
  • 39010b990d inorder-regress: add twolf ALPHA-SE Korey Sewell 2009-05-12 15:01:16 -04:00
  • ca20d1dd23 inorder-regress: add hello world Korey Sewell 2009-05-12 15:01:16 -04:00
  • 6c88730540 inorder-resources: delete events make sure unrecognized events in the resource pool are deleted and also delete resource events in destructor Korey Sewell 2009-05-12 15:01:16 -04:00
  • db2b721380 inorder-tlb-cunit: merge the TLB as implicit to any memory access TLBUnit no longer used and we also get rid of memAccSize and memAccFlags functions added to ISA and StaticInst since TLB is not a separate resource to acquire. Instead, TLB access is done before any read/write to memory and the result is checked before it's sent out to memory. * * * Korey Sewell 2009-05-12 15:01:16 -04:00
  • 3a057bdbb1 inorder-tlb: squash insts in TLB correctly TLB had a bug where if it was stalled and waiting , it would not squash all instructions older than squashed instruction correctly * * * Korey Sewell 2009-05-12 15:01:16 -04:00
  • f1c97e830b inorder-faults: ignore unalign translation faults for prefetches Korey Sewell 2009-05-12 15:01:16 -04:00
  • fe4cd9847d inorder-stc: update interface to handle store conditionals Korey Sewell 2009-05-12 15:01:15 -04:00
  • 6211fe5d2e inorder-float: Fix storage of FP results inorder was incorrectly storing FP values and confusing the integer/fp storage view of floating point operations. A big issue was knowing trying to infer when were doing single or double precision access because this lets you know the size of value to store (32-64 bits). This isnt exactly straightforward since alpha uses all 64-bit regs while mips/sparc uses a dual-reg view. by getting this value from the actual floating point register file, the model can figure out what it needs to store Korey Sewell 2009-05-12 15:01:15 -04:00
  • 3603dd25ef inorder-fetch: update model to use predecoder Korey Sewell 2009-05-12 15:01:15 -04:00
  • c9a03f549b inorder-mem: clean up allocation/deletion of requests/packets * * * Korey Sewell 2009-05-12 15:01:15 -04:00
  • 1c7e988272 inorder-mem: skeleton support for prefetch/writehints Korey Sewell 2009-05-12 15:01:15 -04:00
  • f41df0ee08 inorder-o3: allow both to compile together allow InOrder and O3CPU to be compiled at the same time: need to make branch prediction filed shared by both models Korey Sewell 2009-05-12 15:01:14 -04:00
  • 5127ea226a inorder-unified-tlb: use unified TLB instead of old TLB model Korey Sewell 2009-05-12 15:01:14 -04:00
  • 98b1452058 inorder-miscregs: Fix indexing for misc. reg operands and update result-types for better tracing of these types of values Korey Sewell 2009-05-12 15:01:14 -04:00
  • 2012202b06 inorder/alpha-isa: create eaComp object visible to StaticInst through ISA Remove subinstructions eaComp/memAcc since unused in CPU Models. Instead, create eaComp that is visible from StaticInst object. Gives InOrder model capability of generating address without actually initiating access * * * Korey Sewell 2009-05-12 15:01:14 -04:00
  • b569f8f0ed inorder-bpred: edits to handle non-delay-slot ISAs Changes so that InOrder can work for a non-delay-slot ISA like Alpha. Typically, changes have to do with handling misspeculated branches at different points in pipeline Korey Sewell 2009-05-12 15:01:14 -04:00
  • 1c8dfd9254 inorder-alpha-port: initial inorder support of ALPHA Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions * * * Remove namespace from header file. Causes compiler issues that are hard to find * * * Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time * * * Expose memory access size and flags through instruction object (temporarily memAccSize and memFlags to get TLB stuff working.) Korey Sewell 2009-05-12 15:01:13 -04:00
  • 63db33c4b1 isa-parser: made a few changes, but not author-worthy Korey Sewell 2009-05-12 15:01:13 -04:00
  • a63cc2ff5f Merge Ruby Stuff Korey Sewell 2009-05-11 19:44:34 -04:00
  • f21e80ec72 ruby: assert(false) should be panic. This also fixes some compiler warnings Nathan Binkert 2009-05-11 16:32:32 -07:00
  • c2c68c66b7 stats: remove a few compat leftovers Nathan Binkert 2009-05-11 11:18:09 -07:00
  • 20f1da8b96 python: pull out common code from main that processes arguments Nathan Binkert 2009-05-11 11:18:09 -07:00
  • 5de3b2b6f0 stats: forgot an include for the mysql stuff Nathan Binkert 2009-05-11 11:18:09 -07:00
  • 5b752c1e31 scons: add include guards to info.hh Nathan Binkert 2009-05-11 11:18:09 -07:00
  • cf6b4ef734 ruby: add RUBY sticky option that must be set to add ruby to the build Default is false Nathan Binkert 2009-05-11 10:38:46 -07:00
  • b174ec065e ruby: Initial references for ruby regressions Steve Reinhardt 2009-05-11 10:38:46 -07:00
  • 6df61e1f24 ruby: Set up Ruby regression tests. Steve Reinhardt 2009-05-11 10:38:46 -07:00
  • 93f2f69657 ruby: Working M5 interface and updated Ruby interface. This changeset also includes a lot of work from Derek Hower <drh5@cs.wisc.edu> Daniel Sanchez 2009-05-11 10:38:46 -07:00
  • ebf2f5aadd ruby: Check stderr and not stdin before hanging on an assert. Steve Reinhardt 2009-05-11 10:38:46 -07:00
  • 7769cc9092 ruby: decommission code Polina Dudnik 2009-05-11 10:38:46 -07:00
  • 0ccf8f35a5 ruby: removed dead functions from the sequencer Derek Hower 2009-05-11 10:38:46 -07:00
  • 29f82f265a ruby: Removed g_SIMULATING flag 1. removed checks from tester files 2. removed else clause in Sequencer and DirectoryMemory else clause is needed by the tester, it is up to Derek to revive it elsewhere when he gets to it Polina Dudnik 2009-05-11 10:38:46 -07:00
  • b271090923 ruby: Remove transactional access types (e.g. LD_XACT) from CacheRequestType Polina Dudnik 2009-05-11 10:38:46 -07:00
  • 9f34659c52 ruby: reordered Debug and RubyConfig::init to fix segfault due to uninitialized output file pointer. Polina Dudnik 2009-05-11 10:38:46 -07:00
  • 8cbf8df5b7 ruby: Disabled RubyEventQueue's deletion of its home-grown priority heap. Temporarily to fix unusual memory problem. Dan Gibson 2009-05-11 10:38:46 -07:00
  • 7311fd7182 ruby: Migrate all of ruby and slicc to SCons. Add the PROTOCOL sticky option sets the coherence protocol that slicc will parse and therefore ruby will use. This whole process was made difficult by the fact that the set of files that are output by slicc are not easily known ahead of time. The easiest thing wound up being to write a parser for slicc that would tell me. Incidentally this means we now have a slicc grammar written in python. Nathan Binkert 2009-05-11 10:38:46 -07:00
  • e40b8e34c8 ruby: clean up a few warnings Nathan Binkert 2009-05-11 10:38:45 -07:00
  • 8b9f70b9e4 ruby: Fixed some unresolved references. Dan Gibson 2009-05-11 10:38:45 -07:00
  • 24da30e317 ruby: Make ruby #includes use full paths to the files they're including. This basically means changing all #include statements and changing autogenerated code so that it generates the correct paths. Because slicc generates #includes, I had to hard code the include paths to mem/protocol. Nathan Binkert 2009-05-11 10:38:45 -07:00
  • d8c592a05d ruby: remove unnecessary code. Dan Gibson 2009-05-11 10:38:45 -07:00
  • 6ceaffd724 ruby: Cleaned up sequencer. Removed LogTM specific code. Derek Hower 2009-05-11 10:38:45 -07:00
  • 3d2acc547c ruby: added Packet interface to makeRequest and isReady. Also pushed Packet usage into the Sequencer Derek Hower 2009-05-11 10:38:45 -07:00
  • e1915f16d1 ruby: fold the debugging options into Debug.cc Nathan Binkert 2009-05-11 10:38:45 -07:00
  • 6e8373fad6 ruby: Renamed Ruby's EventQueue to RubyEventQueue Derek Hower 2009-05-11 10:38:45 -07:00
  • ab5e4a22b3 ruby: Removed System name clash by renaming ruby's System to RubySystem Daniel Sanchez 2009-05-11 10:38:44 -07:00
  • 84a18e7fdc ruby: rename config.include to config.hh and clean up the macro stuff. I did the macro cleanup because I was worried that the SCons scanner would get confused. This code will hopefully go away soon anyway. Nathan Binkert 2009-05-11 10:38:44 -07:00
  • b05da09cd6 ruby: strip out some unused defines Nathan Binkert 2009-05-11 10:38:44 -07:00
  • 2f30950143 ruby: Import ruby and slicc from GEMS Nathan Binkert 2009-05-11 10:38:43 -07:00
  • eea2b02b04 branch merge Korey Sewell 2009-05-05 03:01:57 -04:00
  • c70241810d cpus: fix cpu progress event this was double scheduling itself (once in constructor and once in cpu code). also add support for stopping / starting progress events through repeatEvent flag and also changing the interval of the progress event as well Korey Sewell 2009-05-05 02:51:31 -04:00
  • db79945ad0 merge code Korey Sewell 2009-05-05 02:44:21 -04:00