aacc5cb205
inorder: add updatePC event to resPool this will be used for when a thread comes back from a cache miss, it needs to update the PCs because the inst might of been a branch or delayslot in which the next PC isnt always a straight addition
Korey Sewell
2010-01-31 18:27:49 -05:00
90d3b45a56
inorder: ready thread wakeup allow a thread to wakeup and be activated after it has been in suspended state and another thread is switched out. Need to give pipeline stages a "activateThread" function so that can get to their suspended instruction when the time is right.
Korey Sewell
2010-01-31 18:27:38 -05:00
3eb04b4ad7
inorder: add threadmodel flag this prints out messages relative to what threading model is being used (smt, switch-on-miss, single, etc.)
Korey Sewell
2010-01-31 18:27:25 -05:00
611a8642c2
inorder: mem. mgmt. update update address List and address Map to take into account multiple threads
Korey Sewell
2010-01-31 18:27:12 -05:00
4dbc2f1718
inorder: suspend in respool give resources their own specific activity to do for a "suspend" event instead of defaulting to deactivating the thread for a suspend thread event. This really matters for the fetch sequence unit which wants to remove the thread from fetching while other units want to ignore a thread suspension. If you deactivate a thread in a resource then you may lose some of the allotted bandwidth that the thread is taking up...
Korey Sewell
2010-01-31 18:27:02 -05:00
4ea296e296
inorder: fetch thread bug dont check total # of threads but instead all active threads
Korey Sewell
2010-01-31 18:26:54 -05:00
96b493d315
inorder: ready/suspend status fns update/add in the use of isThreadReady & isThreadSuspended functions.Check in activateThread what list a thread is on so it can be managed accordingly.
Korey Sewell
2010-01-31 18:26:47 -05:00
e1fcc64980
inorder: activate thread on cache miss -Support ability to activate next ready thread after a cache miss through the activateNextReadyContext/Thread() functions -To support this a "readyList" of thread ids is added -After a cache miss, thread will suspend and then call activitynextreadythread
Korey Sewell
2010-01-31 18:26:32 -05:00
4a945aab19
inorder: add event priority offset allow for events to schedule themselves later if desired. this is important because of cases like where you need to activate a thread only after the previous thread has been deactivated. The ordering there has to be enforced
Korey Sewell
2010-01-31 18:26:26 -05:00
eac5eac67a
inorder: squash on memory stall add code to recognize memory stalls in resources and the pipeline as well as squash a thread if there is a stall and we are in the switch on cache miss model
Korey Sewell
2010-01-31 18:26:13 -05:00
d8e0935af2
inorder: add insts to cpu event some events are going to need instruction data when they process, so just include the instruction in the event construction
Korey Sewell
2010-01-31 18:26:03 -05:00
e8312ab6f7
inorder: switch out buffer add buffer for instructions to switch out to in a pipeline stage can't squash the instruction and remove the pipeline so we kind of need to 'suspend' an instruction at the stage while the memory stall resolves for the switch on cache miss model
Korey Sewell
2010-01-31 18:25:48 -05:00
a892af7b26
inorder: dont allow early loads - loads were happening on same cycle as the address was generated which is slightly unrealistic. Instead, force address generation to be on separate cycle from load initiation - also, mark the stages in a more traditional way (F-D-X-M-W)
Korey Sewell
2010-01-31 18:25:27 -05:00
0e96798fe0
configs/inorder: add options for switch-on-miss to inorder cpu
Korey Sewell
2010-01-31 18:25:13 -05:00
143d8ea698
ruby: removed last level cache support
Brad Beckmann
2010-01-29 20:29:34 -08:00
90aab239a1
ruby: Added a Scons option to prevent HTML file creation
Brad Beckmann
2010-01-29 20:29:33 -08:00
057f5898ca
ruby: ruby_se.py updated to new config system
Brad Beckmann
2010-01-29 20:29:33 -08:00
c441590b15
ruby: Removed if else statement in create_system
Brad Beckmann
2010-01-29 20:29:33 -08:00
1feae85017
ruby: Removed static members in RubyPort including hitcallback Removed static members in RubyPort and removed the ruby request unique id.
Brad Beckmann
2010-01-29 20:29:33 -08:00
a579d3e43c
ruby: Removed the old config interface
Brad Beckmann
2010-01-29 20:29:33 -08:00
b544462505
Garnet: reorganize directory tree. Rename the ruby/network/garnet-foo directories to garnet/foo. Move the common NetworkHeader.hh file from garnet-fixed-pipeline up to the common garnet directory. Fix up include paths.
Steve Reinhardt
2010-01-29 20:29:30 -08:00
70648cf6aa
ruby: fixed the memory total size variable to be 64-bits
Brad Beckmann
2010-01-29 20:29:24 -08:00
134cc3d48d
ruby: convert to M5 MemorySize Converted both ruby caches and directory memory to use the M5 MemorySize python type.
Brad Beckmann
2010-01-29 20:29:23 -08:00
4eb3bfc31b
ruby: fixed MOESI_hammer data writebacks to the directory
Brad Beckmann
2010-01-29 20:29:22 -08:00
f88faa6c11
ruby: cleaned up ruby profilers Cleaned up the ruby profilers by moving the memory controller profiling code out of the main profiler object and into a separate object similar to the current CacheProfiler. Both the CacheProfiler and MemCntrlProfiler are specific to a particular Ruby object, CacheMemory and MemoryControl respectively. Therefore, these profilers should not be SimObjects and created by the python configuration system, but instead private objects. This simplifies the creation of these profilers.
Brad Beckmann
2010-01-29 20:29:22 -08:00
cfe41d0a1b
ruby: Removed RubySystem::getNumberOfSequencers removed the static function RubySystem::getNumberOfSequencers and replaced it with a python config variable
Brad Beckmann
2010-01-29 20:29:21 -08:00
1907e39fd2
ruby: added ruby stats print Moved the previous rubymem stats print feature to ruby System so that ruby stats are printed on simulation exit.
Brad Beckmann
2010-01-29 20:29:21 -08:00
020716cab3
ruby: fixed Set.cc bug to allow zero sized sets This is necessary for example when no dma sequencers are necessary in the simulated system.
Brad Beckmann
2010-01-29 20:29:21 -08:00
ce2d13195b
ruby: FS support using the new configuration system
Brad Beckmann
2010-01-29 20:29:21 -08:00
dc758641c9
ruby: reorganized ruby python configuration Reorganized ruby python configuration so that protocol and ruby memory system configuration code can be shared by multiple front-end configuration files (i.e. memory tester, full system, and hopefully the regression tester). This code works for memory tester, but have not tested fs mode.
Brad Beckmann
2010-01-29 20:29:20 -08:00
e735ca7c77
ruby: Removed out_link_vec from Consumer Removed the out_line_vec data structure from the Consumer. I'm not sure what this did before, but currently it has no usefulness.
Brad Beckmann
2010-01-29 20:29:20 -08:00
0f6535dba1
ruby: Convered ruby tracing support usage of sequencer Modified ruby's tracing support to no longer rely on the RubySystem map to convert a sequencer string name to a sequencer pointer. As a temporary solution, the code uses the sim_object find function. Eventually, we should develop a better fix.
Brad Beckmann
2010-01-29 20:29:20 -08:00
2c9ca672df
ruby: Memory Controller Profiler with new config system This patch includes a rather substantial change to the memory controller profiler in order to work with the new configuration system. Most noteably, the mem_cntrl_profiler no longer uses a string map, but instead a vector. Eventually this support should be removed from the main profiler and go into a separate object. Each memory controller should have a pointer to that new mem_cntrl profile object.
Brad Beckmann
2010-01-29 20:29:20 -08:00
2a0555470c
ruby: Converted MOESI_hammer dma cntrl to new config system
Brad Beckmann
2010-01-29 20:29:19 -08:00
3b290a35ac
ruby: Added the cache profiler to the new config system
Brad Beckmann
2010-01-29 20:29:19 -08:00
4e5f4b5074
ruby: Converted the sequencer deadlock event to m5 eventq
Brad Beckmann
2010-01-29 20:29:19 -08:00
e15abd17f9
ruby: Wrapped ruby events into m5 events Wrapped ruby events using the m5 event object. Removed the prio_heap from ruby's event queue and instead schedule ruby events on the m5 event queue.
Brad Beckmann
2010-01-29 20:29:19 -08:00
63a60cc81e
ruby: Removed the tech_nm variable from RubySystem
Brad Beckmann
2010-01-29 20:29:19 -08:00
12daaed84a
ruby: Added clock to ruby system As a first step to migrate ruby to the M5 eventqueue, added a clock variable to the ruby system.
Brad Beckmann
2010-01-29 20:29:19 -08:00
ed81489954
ruby: Ruby changes required to use the python config system This patch includes the necessary changes to connect ruby objects using the python configuration system. Mainly it consists of removing unnecessary ruby object pointers and connecting the necessary object pointers using the generated param objects. This patch includes the slicc changes necessary to connect generated ruby objects together using the python configuraiton system.
Brad Beckmann
2010-01-29 20:29:19 -08:00
42bebab779
ruby: connects sm queues to the network
Brad Beckmann
2010-01-29 20:29:18 -08:00
a8ea70dac6
ruby: Calculate system total memory capacity in Python rather than in RubySystem object.
Steve Reinhardt
2010-01-29 20:29:18 -08:00
0b54f1db8e
ruby: Add support for generating topologies in Python.
Steve Reinhardt
2010-01-29 20:29:17 -08:00
184cf4db5b
scons: ignore blank lines in .slicc files
Steve Reinhardt
2010-01-29 20:29:17 -08:00
c6f1d959be
ruby: Make SLICC-generated objects SimObjects. Also add SLICC support for state-machine parameter defaults (passed through to Python as SimObject Param defaults).
Steve Reinhardt
2010-01-29 20:29:17 -08:00
98c94cfe3c
ruby: Convert most Ruby objects to M5 SimObjects. The necessary companion conversion of Ruby objects generated by SLICC are converted to M5 SimObjects in the following patch, so this patch alone does not compile. Conversion of Garnet network models is also handled in a separate patch; that code is temporarily disabled from compiling to allow testing of interim code.
Steve Reinhardt
2010-01-29 20:29:17 -08:00
b43994ba45
ruby: get rid of obsolete, unused CustomTopology class.
Steve Reinhardt
2010-01-29 20:29:14 -08:00
2f567f69cf
tests: added M5_TEST_PROGS environment variable to allow override of global location for regression test binaries.
Steve Reinhardt
2010-01-29 20:29:14 -08:00
589218168c
Automated merge with ssh://hg@m5sim.org/m5
Derek Hower
2010-01-22 17:23:21 -06:00
1c448e2ab0
copyrights: add copyright info to the files I added. checkpoint-aggregator.py was written at UM so I added a UM copyright, agg_se.py was written at AMD so I added the AMD copyright.
Lisa Hsu
2010-01-20 16:47:40 -08:00
d6da172517
util: do checkpoint aggregation more cleanly, fix last changeset. 1) Move alpha-specific code out of page_table.cc:serialize(). 2) Begin serializing M5_pid and unserializing it, but adding an function to do optional paramIn so that old checkpoints don't need to be fixed up. 3) Fix up alpha startup code so that the unserialized M5_pid value is properly written to DTB_IPR_ASN. 4) Fix the memory unserialize that I forgot somehow in the last changeset. 5) Add in an agg_se.py to handle aggregated checkpoints. --bench foo-bar plus positional arguments foo bar are the only changes in usage from se.py. Note this aggregation stuff has only been tested for Alpha and nothing else, though it should take a very minimal amount of work to get it to work with another ISA.
Lisa Hsu
2010-01-19 22:03:44 -08:00
0484432a7c
Automated merge with ssh://hsul@localhost:4444//repo/m5
Lisa Hsu
2010-01-18 14:33:02 -08:00
4a40ac71f8
util: make a generic checkpoint aggregator that can aggregate different cpts into one multi-programmed cpt. Make minor changes to serialization/unserialization to get it to work properly. Note that checkpoints were made with a comment at the beginning with // - this must be changed to ## to work properly with the python config parser in the aggregator.
Lisa Hsu
2010-01-18 14:30:31 -08:00
de904a6d39
SCons: Make --help reflect the arguments to scons.
Gabe Black
2010-01-17 02:22:30 -08:00
8b4e8690b7
cache: make tags->insertBlock() and tags->accessBlock() context aware so that the cache can make context-specific decisions within their various tag policy implementations.
Lisa Hsu
2010-01-12 10:53:02 -08:00
9f63548478
since totalInstructions() is impl'ed by all the cpus, make it an abstract base class.
Lisa Hsu
2010-01-12 10:22:46 -08:00
daebe18e89
faults: i think these fault invocations should be panic and not fatal. it definitely made implementing a trace cpu easier this way.
Lisa Hsu
2010-01-12 10:17:19 -08:00
4f4e6fc099
MIPS: Update the stats of the RUBY version of the regressions.
Gabe Black
2010-01-02 07:06:26 -05:00
47a1f11381
MIPS: Update stats for updated initial environment.
Gabe Black
2009-12-31 15:30:51 -05:00
18dc80e07b
MIPS: Beef up process initialization.
Matt DeVuyst
2009-12-31 15:30:51 -05:00
ecaa7070e6
MIPS: Implement the SE mode version of rdhwr.
Gabe Black
2009-12-31 15:30:51 -05:00
c70f3c93af
MIPS: Fix decoding of the rdhwr instruction.
Gabe Black
2009-12-31 15:30:51 -05:00
134937b594
MIPS: Implement the set_thread_area system call.
Gabe Black
2009-12-31 15:30:50 -05:00
d3ed32b989
MIPS: Create an artificial control register to hold the thread pointer.
Gabe Black
2009-12-31 15:30:50 -05:00
cc07dcf026
MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg.
Gabe Black
2009-12-31 15:30:50 -05:00
1261f1d8db
MIPS: Add missing syscall slots. These are all after the existing ones, suggesting they were added after the original list was created.
Gabe Black
2009-12-21 14:59:40 -08:00
Korey Sewell