e0754c0f6c
misc: add some AMD copyright notices Meant to add these with the previous batch of csets.
Steve Reinhardt
2010-08-17 05:49:05 -07:00
164a211f10
x86: minor checkpointing bug fixes
Steve Reinhardt
2010-08-17 05:20:39 -07:00
f064aa3060
sim: revamp unserialization procedure
Steve Reinhardt
2010-08-17 05:17:06 -07:00
2519d116c9
sim: fold checkpoint restore code into instantiate() The separate restoreCheckpoint() call is gone; just pass the checkpoint dir as an optional arg to instantiate(). This change is a precursor to some more extensive reworking of the startup code.
Steve Reinhardt
2010-08-17 05:17:06 -07:00
cfaddd5fd3
configs: clean up checkpoint code in Simulation.py Small change to clean up some redundant code. Should not have any functional impact.
Steve Reinhardt
2010-08-17 05:17:06 -07:00
5577048bcf
test: Update stats for python object iteration. Small changes in tests with data races due to new object creation order.
Steve Reinhardt
2010-08-17 05:14:03 -07:00
c2e1458746
sim: clean up child handling The old code for handling SimObject children was kind of messy, with children stored both in _values and _children, and inconsistent and potentially buggy handling of SimObject vectors. Now children are always stored in _children, and SimObject vectors are consistently handled using the SimObjectVector class.
Steve Reinhardt
2010-08-17 05:11:00 -07:00
5ea906ba16
sim: move iterating over SimObjects into Python.
Steve Reinhardt
2010-08-17 05:08:50 -07:00
c2cce96a0b
sim: fail on implicit creation of orphans via ports Orphan SimObjects (not in the config hierarchy) could get created implicitly if they have a port connection to a SimObject that is in the hierarchy. This means that there are objects on the C++ SimObject list (created via the C++ SimObject constructor call) that are unknown to Python and will get skipped if we walk the hierarchy from the Python side (as we are about to do). This patch detects this situation and prints an error message.
Steve Reinhardt
2010-08-17 05:06:22 -07:00
1fbe466345
sim: make Python Root object a singleton Enforce that the Python Root SimObject is instantiated only once. The C++ Root object already panics if more than one is created. This change avoids the need to track what the root object is, since it's available from Root.getInstance() (if it exists). It's now redundant to have the user pass the root object to functions like instantiate(), checkpoint(), and restoreCheckpoint(), so that arg is gone. Users who use configs/common/Simulate.py should not notice.
Steve Reinhardt
2010-08-17 05:06:22 -07:00
0f8b5afd7a
tests: update reference config.ini files for previous cset Rename 'responder_set' to 'use_default_range'.
Steve Reinhardt
2010-08-17 05:06:22 -07:00
0685ae7a2d
bus: clean up default responder code. Clean up some minor things left over from the default responder change in rev 9af6fb59752f. Mostly renaming the 'responder_set' param to 'use_default_range' to actually reflect what it does... old name wasn't that descriptive in the first place, but now it really doesn't make sense at all.
Steve Reinhardt
2010-08-17 05:06:21 -07:00
c4ba6967a5
Inorder: Fix compilation of m5.fast.
Gabe Black
2010-08-14 01:00:45 -07:00
961aafc044
Merge with head.
Gabe Black
2010-08-13 06:16:30 -07:00
aa8c6e9c95
CPU: Add readBytes and writeBytes functions to the exec contexts.
Gabe Black
2010-08-13 06:16:02 -07:00
65dbcc6ea1
InOrder: Clean up some DPRINTFs that print data sent to/from the cache.
Gabe Black
2010-08-13 06:16:00 -07:00
52a90a5998
CPU: Tidy up endianness handling for mmapped "IPR"s.
Gabe Black
2010-08-13 06:10:45 -07:00
73d9a51835
util/m5/m5.c: ensure readfile() buffer pages are in page table (and marked dirty, in case that matters) by touching them beforehand
Joel Hestness
2010-08-12 17:16:04 -07:00
53c241fc16
TimingSimpleCPU: fix NO_ACCESS memory op handling
Joel Hestness
2010-08-12 17:16:02 -07:00
2e9e75447a
None, not none
Nathan Binkert
2010-08-08 22:57:16 -07:00
545a6fcd04
.hgignore: added src/doxygen
Steve Reinhardt
2010-07-27 20:00:38 -07:00
1b73376b0b
ARM: Add regression tests
Ali Saidi
2010-07-27 01:03:44 -04:00
97d245278d
Power: The condition register should be set or cleared upon a system call return to indicate success or failure.
Timothy M. Jones
2010-07-22 18:54:37 +01:00
607f519800
LSQ Unit: After deleting part of a split request, set it to NULL so that it isn't accidentally deleted again later (causing a segmentation fault).
Timothy M. Jones
2010-07-22 18:54:37 +01:00
28a5ea3f99
Port: Only indicate that a SimpleTimingPort is drained if its send event is not scheduled, as well as the transmit list being empty.
Timothy M. Jones
2010-07-22 18:54:37 +01:00
e50a880297
O3CPU: Fix a bug where stores in the cpu where never marked as split.
Timothy M. Jones
2010-07-22 18:52:02 +01:00
0d301ca4c4
Syscall: Don't close the simulator's standard file descriptors.
Timothy M. Jones
2010-07-22 18:47:52 +01:00
9a3533ec84
O3CPU: O3's tick event gets squashed when it is switched out. When repeatedly switching between O3 and another CPU, O3's tick event might still be scheduled in the event queue (as squashed). Therefore, check for a squashed tick event as well as a non-scheduled event when taking over from another CPU and deal with it accordingly.
Timothy M. Jones
2010-07-22 18:47:43 +01:00
8c76715979
Power: Provide a utility function to copy registers from one thread context to another in the Power ISA.
Timothy M. Jones
2010-07-22 18:47:03 +01:00
21bf6ff101
stats: unify the two stats distribution type better
Nathan Binkert
2010-07-21 18:54:53 -07:00
2a1309f213
stats: cleanup a few small problems in stats
Nathan Binkert
2010-07-21 15:53:53 -07:00
76c92c3e30
python: add a sorted dictionary class It would be nice if python had a tree class that would do this for real, but since we don't, we'll just keep a sorted list of keys and update it on demand.
Nathan Binkert
2010-07-21 15:53:53 -07:00
3518416917
python: Add mechanism to override code compiled into the exectuable If the user sets the environment variable M5_OVERRIDE_PY_SOURCE to True, then imports that would normally find python code compiled into the executable will instead first check in the absolute location where the code was found during the build of the executable. This only works for files in the src (or extras) directories, not automatically generated files.
Nathan Binkert
2010-07-21 15:53:52 -07:00
11bb678a80
Fix x86 XCHG macro-op to use locked micro-ops for all memory accesses
Tushar Krishna
2010-07-21 09:55:57 -07:00
262b2e2b94
SimObject: transparently forward Python attribute refs to C++. This tidbit was pulled from a larger patch for Tim's sake, so the comment reflects functions that haven't been exported yet. I hope to commit them soon so it didn't seem worth cleaning up.
Steve Reinhardt
2010-07-17 08:56:49 -07:00
8cec870568
ARM: Make an SRS instruction with a bad mode cause an undefined instruction fault.
Gabe Black
2010-07-15 02:11:56 -07:00
4e3183cb1e
ARM: Adjust the FP_Base_DepTag to be larger than the largest int reg index.
Gabe Black
2010-07-13 22:41:47 -07:00
897247d63b
cache: fix bug in SC upgrade handling This bug was introduced with the recent rework of SC failure handling in cset f97b62be544f.
Steve Reinhardt
2010-07-08 17:56:13 -07:00
a03c1cd6e0
garnet: Added topology print function to Garnet printStats
Brad Beckmann
2010-07-08 16:18:20 -07:00
26f5a9c2cb
checkpointing: another small overload fix On Nate's advice, overload 'char' as well as 'signed char' and 'unsigned char'.
Steve Reinhardt
2010-07-05 22:57:23 -07:00
387cbffb7a
sim: allow SimObject subclasses to define classmethods (without requiring a leading underscore) Also a little cleanup on type names in SimObject.py.
Steve Reinhardt
2010-07-05 21:39:38 -07:00
30ce620d1d
sim: fold StartupCallback into SimObject There used to be a reason to have StartupCallback be a separate object, but not any more. Now it's just confusing.
Steve Reinhardt
2010-07-05 21:39:38 -07:00
345dfd1b41
checkpointing: minor cleanup. Move some static checkpoint stuff into the Checkpoint object namespace.
Steve Reinhardt
2010-07-05 21:39:38 -07:00
820bb3044d
checkpointing: fix minor bug Somehow we now need to explicitly specialize on 'signed char' and not just 'char' to catch cases like int8_t
Steve Reinhardt
2010-07-05 21:39:38 -07:00
cbd65e95db
util: add a script for testing checkpointing See comments in util/checkpoint-tester.py for details.
Steve Reinhardt
2010-07-05 21:39:38 -07:00
f98cce5771
process: get rid of some unused code & vars
Steve Reinhardt
2010-07-05 21:39:38 -07:00
2c2f956060
process: minor format/style cleanup
Steve Reinhardt
2010-07-05 21:39:38 -07:00
66f0d26059
style: updated garnet to match M5 coding style
Tushar Krishna
2010-06-22 15:36:07 -07:00
84489c5874
inorder: remove another debug stat
Korey Sewell
2010-06-28 07:33:33 -04:00
792c18a1fc
inorder: remove debugging stat m5 doesnt do stats specific to binary and this resource request stat is probably only useful for people who really know the ins/outs of the model anyway
Korey Sewell
2010-06-26 09:41:39 -04:00
868181f24d
inorder: Return Address Stack bug the nextPC was getting sent to the branch predictor not the current PC, so the RAS was returning the wrong PC and mispredicting everything.
Korey Sewell
2010-06-25 17:42:35 -04:00
6bfd766f2c
inorder: resource scheduling backend replace priority queue with vector of lists(1 list per stage) and place inside a class so that we have more control of when an instruction uses a particular schedule entry ... also, this is the 1st step toward making the InOrderCPU fully parameterizable. See the wiki for details on this process
Korey Sewell
2010-06-25 17:42:34 -04:00
6697d41693
X86: Fix div2 flag calculation.
Gabe Black
2010-06-25 00:21:48 -07:00
71b67d408b
inorder: cleanup virtual functions remove the annotation 'virtual' from function declaration that isnt being derived from
Korey Sewell
2010-06-24 15:34:19 -04:00
1a73764403
inorder: squash from memory stall this applies to multithreading models which would like to squash a thread on memory stall
Korey Sewell
2010-06-23 22:09:49 -04:00
1f778b3583
inorder: record load/store trace data
Korey Sewell
2010-06-23 18:21:12 -04:00
defab3ffd5
inorder: update branch predictor - use InOrderBPred instead of Resource for DPRINTFs - account for DELAY SLOT in updating RAS and in squashing - don't let squashed instructions update the predictor - the BTB needs to use the ASID not the TID to work for multithreaded programs - add stats for BTB hits
Korey Sewell
2010-06-23 18:19:18 -04:00
9f0d8f252c
inorder-stats: add instruction type stats also, remove inst-req stats as default.good for debugging but in terms of pure processor stats they aren't useful
Korey Sewell
2010-06-23 18:18:20 -04:00
39ac4dce04
inorder: stall signal handling remove stall only when necessary add debugging printfs
Korey Sewell
2010-06-23 18:15:23 -04:00
7695d4c63f
inorder: tick scheduling use nextCycle to calculate ticks after addition
Korey Sewell
2010-06-23 18:14:59 -04:00
de2321de81
cache: fix longstanding prefetcher bug Thanks to Joe Gross for pointing this out (again?). Apologies to anyone who pointed it out earlier and we didn't listen.
Steve Reinhardt
2010-06-22 21:29:43 -07:00
96767fc721
O3ThreadContext: When taking over from a previous context, only assert that the system pointers match in Full System mode.
Timothy M. Jones
2010-06-23 00:53:17 +01:00
625854785b
stats: update stats for SC protocol change Some subset of UpgradeReq messages shifted to the new SCUpgradeReq type. Other than that there are no significant differences.
Steve Reinhardt
2010-06-16 15:25:57 -07:00
f24ae2ec2a
cache: fail store conditionals when upgrade loses race Requires new "SCUpgradeReq" message that marks upgrades for store conditionals, so downstream caches can fail these when they run into invalidations. See http://www.m5sim.org/flyspray/task/197
Steve Reinhardt
2010-06-16 15:25:57 -07:00
57f2b7db11
cache: fix dirty bit setting Only set the dirty bit when we actually write to a block (not if we thought we might but didn't, as in a failed SC or CAS). This requires makeing sure the dirty bit stays set when we get an exclusive (writable) copy in a cache-to-cache transfer from another owner, which n turn requires copying the mem-inhibit flag from timing-mode requests to their associated responses.
Steve Reinhardt
2010-06-16 15:25:57 -07:00
f90319d3b8
stats: rename print to display in the mysql code too...sorry
Nathan Binkert
2010-06-15 14:00:41 -07:00
e54b673315
stats: rename print to display so it work in python
Nathan Binkert
2010-06-15 08:34:19 -07:00
86a93fe7b9
stats: only consider a formula initialized if there is a formula
Nathan Binkert
2010-06-15 01:18:36 -07:00
54d813adca
stats: get rid of the never-really-used event stuff
Nathan Binkert
2010-06-14 23:24:46 -07:00
420402c0a3
util: clean up attrdict and import multiattrdict into m5.util
Nathan Binkert
2010-06-14 23:24:46 -07:00
5fc7adcba0
python: use ipython in --interactive if it is available
Nathan Binkert
2010-06-14 23:24:46 -07:00
70497d6a18
build: grab the right library if we're using a debug version of python
Nathan Binkert
2010-06-14 23:24:45 -07:00
dd133c7b24
ruby: get rid of PrioHeap and use STL
Nathan Binkert
2010-06-10 23:17:07 -07:00
3df84fd8a0
ruby: get rid of the Map class
Nathan Binkert
2010-06-10 23:17:07 -07:00
006818aeea
ruby: get rid of Vector and use STL add a couple of helper functions to base for deleteing all pointers in a container and outputting containers to a stream
Nathan Binkert
2010-06-10 23:17:07 -07:00
bc87fa30d7
ruby: get rid of RefCnt and Allocator stuff use base/refcnt.hh
Nathan Binkert
2010-06-10 23:17:06 -07:00
aa78887970
flags: add comment to avoid future deletions since code appears redundant.
Lisa Hsu
2010-06-09 10:47:37 -07:00
d28572499f
flags: Unserializing old checkpoints before the introduction of the Initialized flag would break, set Initialized for events upon unserialization.
Lisa Hsu
2010-06-08 17:16:36 -07:00
4977d8b58f
scons: make RUBY a regular (non-global) sticky var and force it to True for builds that imply Ruby protocols (else unexpected things happen when testing these builds with RUBY=False).
Steve Reinhardt
2010-06-07 12:19:59 -04:00
744b59d6de
tests: Update O3 ref outputs to reflect Lisa's dist format change.
m5test
2010-06-06 18:39:10 -04:00
30deac9050
stats: fix stats diff script Previously the return value ignored missing/added stats, making the regressions not tell you when you needed to update the reference stats because of these changes. Also stop filtering distributions when reporting these; not sure why we did that in the first place. Also get rid of obsolete hacks for the "fetch-loss" stats that have been gone for a long time.
Steve Reinhardt
2010-06-06 01:22:14 -04:00
d0af5e9df6
More minor gdb-related cleanup. Found several more stale includes and forward decls.
Steve Reinhardt
2010-06-03 19:41:34 -07:00
a529dbfe65
Act like enabling CPUs is no big deal, rather than a scary thing that might not work.
Steve Reinhardt
2010-06-03 16:54:28 -07:00
f92e91e853
Minor remote GDB cleanup. Expand the help text on the --remote-gdb-port option so people know you can use it to disable remote gdb without reading the source code, and thus don't waste any time trying to add a separate option to do that. Clean up some gdb-related cruft I found while looking for where one would add a gdb disable option, before I found the comment that told me that I didn't need to do that.
Steve Reinhardt
2010-06-03 16:54:26 -07:00