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6661 Commits

Author SHA1 Message Date
Steve Reinhardt
89f0bc9e4c Print ports in config.ini as well. 
--HG--
extra : convert_revision : 703d3a57250613315735709de8f40a9956cee6e2
 2006-09-05 12:22:47 -07:00
Steve Reinhardt
c39aea440c More Python hacking to deal with config.py split 
and resulting recursive import trickiness.

--HG--
extra : convert_revision : 1ea93861eb8d260c9f3920dda0b8106db3e03705
 2006-09-04 17:14:07 -07:00
Steve Reinhardt
1233dbb998 Split config.py into multiple files. 
Some tweaking to deal with mutually recursive imports.

--HG--
rename : src/python/m5/config.py => src/python/m5/SimObject.py
extra : convert_revision : 166f7bfabfd20100e93d26a89382469465859988
 2006-09-04 10:52:26 -07:00
Steve Reinhardt
a658d25d42 config.py: 
Import of changes for auto-generation of C++ param structs
from my old m5 working directory.
This code is *broken* because pieces need to be shuffled around
to satisfy name dependencies, but that really messes up the
diff, so I want to make an intermediate commit here.

src/python/m5/config.py:
    Import of changes for auto-generation of C++ param structs
    from my old m5 working directory.
    This code is *broken* because pieces need to be shuffled around
    to satisfy name dependencies, but that really messes up the
    diff, so I want to make an intermediate commit here.

--HG--
extra : convert_revision : cb25ee1f4f77d1902511ee9aa766403733dd8841
 2006-09-04 10:40:33 -07:00
Gabe Black
b11018ca12 Made system calls use the uid, etc parameters from the live process. 
--HG--
extra : convert_revision : 2aadb87b4602324423aadb903010f5b49fcef41b
 2006-09-03 02:12:11 -04:00
Gabe Black
c32ef326d2 Fix up the parameters to getInstRecord 
--HG--
extra : convert_revision : 0fac43035a2510d3a3f596d3d8f57193045570f6
 2006-09-03 02:10:05 -04:00
Gabe Black
936d8c3e65 Make the ASI constants available to the decoder. 
--HG--
extra : convert_revision : 65f2e02ce8f5e4f0c8727ebf16c927c7a6a4fe7f
 2006-09-03 02:09:25 -04:00
Gabe Black
16f9b901be Make the auxiliary vectors use the uid, euid, gid and egid parameters from the live process 
--HG--
extra : convert_revision : 945b5883a15a6df35709edea2731f54a2448e418
 2006-09-03 02:08:24 -04:00
Gabe Black
387bbe40d1 Fixing up parameters of getInstRecord 
--HG--
extra : convert_revision : 4ce06ac4f7d135cc04b39cf0e957a2539c7e946d
 2006-09-03 02:05:44 -04:00
Gabe Black
96dabdc9b0 Added uid, euid, gid, egid, pid and ppid parameters to a live process. 
--HG--
extra : convert_revision : 2101be8000bcdaf683730cfc079b4b78e34365d0
 2006-09-03 02:04:25 -04:00
Gabe Black
14cc9baba5 A quick fix to isolate the tracing code to SPARC 
--HG--
extra : convert_revision : 90c77f4d01101cad55f60d528b2a8be92d2f9aba
 2006-09-03 02:02:56 -04:00
Steve Reinhardt
abe18be544 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  vm1.(none):/home/stever/bk/newmem-head

--HG--
extra : convert_revision : 8b0fbb6b1ea38d01d048381f18fd95ab63c4c0f1
 2006-09-01 17:12:43 -07:00
Steve Reinhardt
30c93db065 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/z/stever/bk/newmem-head

--HG--
extra : convert_revision : 54c63c9a8c7146bb45ecfa9a177ab0bda9541d1b
 2006-09-01 12:59:48 -04:00
Steve Reinhardt
edeb8f39a7 Tweak proxy resolution error message. 
--HG--
extra : convert_revision : 3b186209515975be0d8bc9acc214425adcaa16f2
 2006-08-31 17:58:46 -07:00
Korey Sewell
82862e0e15 add ISA_HAS_DELAY_SLOT directive instead of "#if THE_ISA == ALPHA_ISA" throughout CPU models 
src/arch/alpha/isa_traits.hh:
src/arch/mips/isa_traits.hh:
src/arch/sparc/isa_traits.hh:
    define 'ISA_HAS_DELAY_SLOT'
src/cpu/base_dyn_inst.hh:
src/cpu/o3/bpred_unit_impl.hh:
src/cpu/o3/commit_impl.hh:
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
src/cpu/o3/decode_impl.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/iew_impl.hh:
src/cpu/o3/inst_queue_impl.hh:
src/cpu/o3/rename_impl.hh:
src/cpu/simple/base.cc:
    use ISA_HAS_DELAY_SLOT instead of THE_ISA == ALPHA_ISA

--HG--
extra : convert_revision : 24c7460d9391e8d443c9fe08e17c331ae8e9c36a
 2006-08-31 20:51:30 -04:00
Steve Reinhardt
f9ae0dcf10 Move more common functionality into SimpleTimingPort, 
allowing derived classes to be simplified.

--HG--
extra : convert_revision : c980d3aec5e6c044d8f41e96252726fe9a256605
 2006-08-30 16:24:26 -07:00
Gabe Black
fa0fca3227 Change the cpu pointer in the InstRecord object to a thread context pointer. 
--HG--
extra : convert_revision : 7efb2680cef4219281b94d680a4a7c75c123f89d
 2006-08-30 19:08:24 -04:00
Gabe Black
05177abbc9 Forgot some commas 
--HG--
extra : convert_revision : d178c87ba156be6302f871f1ab1030889586168f
 2006-08-30 18:33:47 -04:00
Steve Reinhardt
a8a7ce2b88 Minor include file & formatting cleanup. 
--HG--
extra : convert_revision : fa23563b2897687752379d63ddab5cccb92484ba
 2006-08-30 09:57:46 -07:00
Gabe Black
bdb5df86a3 ASI constants. 
--HG--
extra : convert_revision : 888024c9f7e909fa377de6d67a41ea1d4cf9945a
 2006-08-29 16:08:56 -04:00
Gabe Black
02f3b21c42 Set both xcc.c and icc.c on return from a syscall. 
--HG--
extra : convert_revision : 9c2b32d735b816021cdd3af24002f309e22a8d64
 2006-08-29 16:07:22 -04:00
Gabe Black
9231d2235d Don't store if there's a fault. 
--HG--
extra : convert_revision : fc852bee572b36daab7a34ee1820f856ccd71ca5
 2006-08-29 16:06:27 -04:00
Gabe Black
df0cbf890a Extended the reg delta output. 
--HG--
extra : convert_revision : 61c714a8c4faeb30d784b1ef1da0295474b8dc45
 2006-08-29 16:04:28 -04:00
Gabe Black
292d3ae14a Fiddled with the floating point accessors. 
--HG--
extra : convert_revision : 78cbd0c28d3fa1109eb2eacaf2a8009f13158a9b
 2006-08-29 16:02:54 -04:00
Gabe Black
7ac1d10eb5 Cleaned up floating point by removing unnecessary conversions and by implementing faligndata more correctly. 
--HG--
extra : convert_revision : 44e778ce8f8d8606b6a50f3f12f0b87e1bf0ed66
 2006-08-29 02:40:24 -04:00
Steve Reinhardt
72eb4f5f12 Clean up BAR setting code. 
--HG--
extra : convert_revision : 8378be6cd6f55af7a199296cb2ff61ee94849bf7
 2006-08-28 11:17:49 -07:00
Steve Reinhardt
b77da23e1a Get rid of unneeded union. 
Verify that BAR sizes are powers of two.

--HG--
extra : convert_revision : ce8dca07aaf1a340cc166b99b5858613a954e2fd
 2006-08-28 11:01:25 -07:00
Steve Reinhardt
19d51452b1 Get rid of unused BARAddrs[] in PciConfigData object. 
--HG--
extra : convert_revision : a82e05326ca6150c70cb288b28f9f6eee89ad93d
 2006-08-28 10:34:15 -07:00
Steve Reinhardt
acfa88f732 Cleanup: formatting, comments, DPRINTFs. 
--HG--
extra : convert_revision : 565ab099f1c0744a13959e721c19dd03b7630f04
 2006-08-28 10:28:31 -07:00
Steve Reinhardt
55bde23071 Fix remote gdb buffer overflow. 
--HG--
extra : convert_revision : e5e5206bdd48120cebcb1e339b1dab2e10f4b6cf
 2006-08-28 09:58:03 -07:00
Steve Reinhardt
98e71d9ba6 Make address formats consistent in DPRINTFs. 
--HG--
extra : convert_revision : 73c6616aa9228c08e21fcc134dd0e675cd57aee6
 2006-08-28 09:55:13 -07:00
Steve Reinhardt
c5384366b6 Add dup() support (from Antti Miettinen). 
--HG--
extra : convert_revision : 72c834666afa3c353da026617ad5e7a762eb645f
 2006-08-28 07:39:56 -07:00
Ron Dreslinski
95e7b85c8b Still need LL/SC support in cache, add hack to always return success for now 
--HG--
extra : convert_revision : b354bd91be8c1bbb3aca7b4ba9e7e3e117ced164
 2006-08-22 16:09:34 -04:00
Ron Dreslinski
9f18764441 Commiting a version of the multi-phase snoop atomic bus so people can see the framework. Doesn't work, but also doesn't break uni-processor systems. 
Working on pulling out the changes in the cache so that it remains working.

src/mem/bus.cc:
    Changes for multi-phase snoop
    Some code for registering snoop ranges (a version that compiles and runs, but does nothing)
src/mem/bus.hh:
    Changes for multi-phase snoop
src/mem/packet.hh:
    Flag for multi-phase snoop
src/mem/port.hh:
    Status for multi-phase snoop

--HG--
extra : convert_revision : 4c2e5263bba16e3bcf03aabe36ff45ec36de4720
 2006-08-22 16:08:18 -04:00
Gabe Black
dda9819d93 Fix annulled unconditional branches 
--HG--
extra : convert_revision : 698b0ce38c7a47306f97df2cc80cdae4a51b22c7
 2006-08-21 22:41:57 -04:00
Gabe Black
ad867018d0 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ewok.(none):/home/gblack/m5/newmem

--HG--
extra : convert_revision : 15d8fd51f0c70da4d2e52c11864f3ab0f3f62811
 2006-08-21 15:09:18 -04:00
Gabe Black
0b0556a1da Got rid of the aux_data array since it shouldn't have existed. 
Added in the filename parameter which is provided for the user space linker.
Fix the ordering and alignment of stack elements.
Made mmap start with the address it has been seen starting with "in the wild"

--HG--
extra : convert_revision : 8734753145f59a6cb433e4f92f43cb28a44b56d4
 2006-08-21 14:29:50 -04:00
Gabe Black
623c697a3f Fixed the parameters to memset. sizeof(regSegments[x]) may have been returning the size of a pointer to an IntReg 
--HG--
extra : convert_revision : 02c04ffceb447b7683ba5ebd4752819d0014cc19
 2006-08-21 14:25:51 -04:00
Gabe Black
e54c5c99de Two bugs found by my tracing tool. 
1. alignaddr wrote it's address to a floating point register rather than a gpr.
2. sethi was sign extending it's immediate value.

--HG--
extra : convert_revision : 9aa30a6485bc4cba916367973b986d439b7c7588
 2006-08-21 14:23:39 -04:00
Ron Dreslinski
689eb39d48 Merge zizzer:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/newmem

src/python/m5/objects/BaseCPU.py:
    Merge duplicate change

--HG--
extra : convert_revision : 214e57999ee78aadfc86e1f0b7198ff0d981ce16
 2006-08-21 13:20:35 -04:00
Ron Dreslinski
825a7aadd2 Changes so that time in the packet is actually set properly. 
src/mem/packet.hh:
    Make sure packets set the time parameter correctly.

--HG--
extra : convert_revision : e381d2789e0aaa1b6c2fbde417b7ba5815deec61
 2006-08-21 13:16:46 -04:00
Steve Reinhardt
a12dbc3074 Update reference outputs 
--HG--
extra : convert_revision : 110a6c51cc1c562d115492b7360bfdbbded8eefd
 2006-08-18 00:17:21 -04:00
Steve Reinhardt
2b70b74c9b Changes to build m5.fast 
--HG--
extra : convert_revision : 2ec600b8e72e40e8b96e3b1dbe0334aa05e0f30b
 2006-08-17 23:13:11 -04:00
Ali Saidi
a3bf5f1953 add default range to PhysicalMemory 
--HG--
extra : convert_revision : 0a622ab0f0f7653d28d4ed3dd27113ae2bc82cae
 2006-08-17 18:46:43 -04:00
Ron Dreslinski
6eebfda2d9 Fix the caches not working in the regression 
src/python/m5/objects/BaseCPU.py:
    Make mem parameter a MemObject, not just a PhysicalMemory
    Fix a reference not using self
tests/configs/simple-atomic.py:
    Set the mem paramter
tests/configs/simple-timing.py:
    Set the mem parameter

--HG--
extra : convert_revision : 6bd9df36831a1c5bafc9e88ab945c2ebe91db785
 2006-08-16 23:46:54 -04:00
Ali Saidi
c7bb14ac79 DRAM Memory doesn't crash the simulator now.. still untested. 
--HG--
extra : convert_revision : fa2d2c5ec4073383f1b2b2f466d0245f2d6a6c35
 2006-08-16 23:39:31 -04:00
Ali Saidi
402fbda3df Merge zizzer:/bk/newmem 
into  zeep.pool:/z/saidi/tmp/m5.newmem

--HG--
extra : convert_revision : f4fa62290ca2bbd4726fb6c8e89655dade53bb68
 2006-08-16 19:01:23 -04:00
Ali Saidi
2f145ac54a Fix Physical Memory to allow memory sizes bigger than 128MB. 
Kinda port DRAM to new memory system. The code is *really* ugly (not my fault) and right now something about the stats it uses
causes a simulator segfault.

src/SConscript:
    Add dram.cc to sconscript
src/mem/physical.cc:
src/mem/physical.hh:
    Add params struct to physical memory, use params, make latency function be virtual
src/python/m5/objects/PhysicalMemory.py:
    Add DRAMMemory python class

--HG--
extra : convert_revision : 5bd9f2e071c62da89e8efa46fa016f342c01535d
 2006-08-16 19:01:11 -04:00
Steve Reinhardt
df3af8018e Minor regression fixes. 
src/python/m5/objects/BaseCPU.py:
    bug fix
tests/SConscript:
    fix up diff ignore strings to reflect changes
    in m5 output

--HG--
extra : convert_revision : b8e4acee34599ddd431b69fc9d40b6f6e440d128
 2006-08-16 14:16:52 -07:00
Ron Dreslinski
27d60c27fa Merge zizzer:/z/m5/Bitkeeper/newmem 
into  zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/newmem

--HG--
extra : convert_revision : 659f84c883b9992ae48f26c837983b9f8fcf18ab
 2006-08-16 15:59:26 -04:00