Commit Graph

78 Commits

Author SHA1 Message Date
Melissa Jost
eb07d3fcf4 misc: Update documentation and links for GitHub
This changes mentions of googlesource and Gerrit to instead
link to the gem5 GitHub repository, and updates the documentation
to reflect the GitHub review process.

Change-Id: I5dc1d9fcf6b96f9e5116802f938b7e3bb5b09567
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/71878
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-07-10 22:57:28 +00:00
Bobby R. Bruce
54501c3e2b misc: Merge branch 'stable' into 'develop'
This ensures all commits in v23.0 are now in the develop branch.

Change-Id: I791346115dd123f3541a3c8060482e00cf4dbfb5
2023-07-10 12:24:27 -07:00
Hoa Nguyen
307ec86f05 configs: Add example configuration for OctopiCache
Change-Id: Ia78dd63e63808ebad40052d2a7cdb67cc7179e44
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/71618
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2023-06-15 23:07:47 +00:00
Ayaz Akram
f4559a703f configs: Fix SPEC benchmarks example scripts
This small change fixes the gem5_library example
scripts for SPEC benchmarks to make them compatible
with the latest version of the std library.

Change-Id: I3da9745f0ee6b253871e32082e135e0fa4040108
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/71718
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-06-14 23:16:10 +00:00
Melissa Jost
f15ddf8206 configs: Fix RISCVMatched Test
Updated the import of the RISCVMatchedBoard so there would be
no more errors calling it.

Change-Id: I2dda4783edaa18851269860757d5b8ee58625838
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69458
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-04-08 21:49:02 +00:00
HJikram
d632bba119 stdlib: small fix in spec-2006 and spec-2007
I modified the spec-2017 benchmark file to include a
processor.switch() statement (which had been removed
in an earlier commit). I also replaced the use of
get_roi_ticks() with get_tick_stopwatch() as this
particular workload is not annotated with "workbegin"
and "workend" annotations.

Lastly, I fixed a minor bug in the spec-2006 file
which printed the total simulated ticks as zero due
to incorrect indexing of get_tick_stopwatch().

Change-Id: If0b6f88d6701a11f32e2e69994582524e0d7097b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69537
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2023-04-08 10:35:45 +00:00
HJikram
f7f5b68202 stdlib: Small fix in stdlib spec2006 script
The call to processor switch from KVM to TIMING was
removed in an earlier commit. This change fixes that.
Also, get_roi_ticks() doesn't work because spec2006
does not have work_begin and work_exit annotations.
This change uses get_tick_stopwatch() to calculate
the roi ticks.

Change-Id: I55efe28ebd686cb4e6c88a528533127fb73c88ed
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69357
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-04-04 11:25:22 +00:00
803f9f5aa7 stdlib,configs: Add DRAMSys to the gem5 standard library
Add DRAMSys as a new AbstractMemorySystem to the gem5 stdlib.
Also, provide convenient subclasses with predefined DRAMSys
configurations.

Add two new stdlib examples:
    - dramsys-traffic.py: Demonstrates the usage of DRAMSys
      using the stdlib TrafficGenerators
    - arm-hello-dramsys.py: A variant of the arm-hello.py
      script that uses DRAMSys as it's memory.

These DRAMSys memory components are only compiled into the standard
library if DRAMSys is not compiled into gem5.

Change-Id: I9db87c41fbd9c28bc44e9d6bde13fc225dc16be9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62914
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-29 08:19:08 +00:00
Giacomo Travaglini
e73655d038 misc: Use python f-strings for string formatting
This patch has been generated by applying flynt to the
gem5 repo (ext has been excluded)

JIRA: https://gem5.atlassian.net/browse/GEM5-831

Change-Id: I0935db6223d5426b99515959bde78e374cbadb04
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68957
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-03-16 09:05:29 +00:00
paikunal
cdab011373 configs: Adds an example script for POWER Hello
Used the "power-hello" resource to make an
stdlib example script for that resource

Change-Id: Ia8a051330e263617aa0e2ef08321d01cfa1093c4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68737
Reviewed-by: Boris Shingarov <shingarov@labware.com>
Maintainer: Boris Shingarov <shingarov@labware.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-03-08 03:43:44 +00:00
Bobby R. Bruce
3bb19be083 configs,stdlib: Add Workloads to Looppoint examples
Change-Id: I6a0eebb127ad8a6796c96390594868668424c9b4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68117
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-02-23 12:07:30 +00:00
Bobby R. Bruce
55348d062c configs,stdlib: Update simpoint-se-restore checkpoint
This patch fixes the checkpoint resource for the simpoints-se-restore.py
script.

Change-Id: I29698844023c54fdc645c99da4a19c77bae58729
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68338
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-02-23 12:07:30 +00:00
Bobby R. Bruce
ce516397da configs stdlib: Update checkpoint resource for riscv-hello
This change updates the riscv-hello-restore-checkpoint.py script's
checkpoint for one compatible with v23

Change-Id: Idee262491db45049d9afe69190bc8890d75c8cdf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/68337
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-02-23 12:07:30 +00:00
Bobby R. Bruce
4ad1150372 stdlib: Add the LooppointCsvResource resource
This resource wraps the LooppointCsvLoader class so it may be obtained
as a specialized resource via gem5 resources.

Relevant tests and config scripts have been updated.

Change-Id: Ib8e5ff5500fb1560951c9c0110e3c3aec8ca3c42
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67857
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-02-23 12:07:30 +00:00
Bobby R. Bruce
aae3430281 stdlib: Refactor Looppoint
This change refactors the Looppoint files. While functionally
equivalent, this classes have been moved and altered to be easier to
handle going forward. The following changes have been made:

- New classes have been added to represent the data structure of the
  Looppoint JSON. This simplifies the parsing of JSON files and makes it
  handle Looppoint data structures. Ultimately this is hidden from the
  user via the new 'gem5.resources.Looppoint' class which will be the
  front-facing class for Looppoint interactions.
- The `LooppointCheckpoint` class has been replaced with
  `LooppointCsvLoader`. This new class takes in a CSV pintpoints file
  to load necessary looppoint data.
- The `LoopPointRestore` class has been replaced by
  `LooppointJsonLoader`.
- All Looppoint classes have been moved to `gem5.resources`. This will
  make it easier when we add Looppoints as specific gem5 resources.

Change-Id: I11dd1fe8f76658db220320584270d57cb37a3c62
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67611
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-02-23 12:07:30 +00:00
Bobby R. Bruce
f59d860e51 stdlib: Add looppoint example scripts
Change-Id: If9827af9ba7958af492a6c09cf83e4f6dac9a2eb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67493
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2023-02-23 12:07:30 +00:00
Bobby R. Bruce
e1601954f0 stdlib: Implement Simpoint Resources
This patches does the following:
- Adds 'SimpointResource' which encapsulates Simpoint data and
  functionality. It replaces the old 'gem5.util.simpoint.SimPoint'
  class. Simpoints can be loaded from gem5-resources using the
  `obtain_resource` function.
- Adds 'SimpointDirectoryResource'. This inherits form
  'SimpointResource'. While 'SimpointResource' takes raw Simpoint data
  via parameters, 'SimpointDirectoryResource' assumes the data exists
  in files, in a directory.
- Updates the
  "configs/example/gem5_library/checkpoints/simpoints-se-checkpoint.py"
  and
  "configs/example/gem5_library/checkpoints/simpoints-se-restory.py"
  example files to utilize this new Simpoint resource classes.

**Note**: While the old "SimPoint" class
("src/python/gem5/util/simpoint.py") is marked as deprecated, it may be
difficult to utilize given updates to the APIs in the gem5 stdlib Cores
and Simulator modules.

Change-Id: I9bed5c643ffc735838c9f22a58c53547941010e7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67339
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2023-02-22 19:30:09 +00:00
Bobby R. Bruce
e81aa1cd86 configs: Alter x86-npb-benchmarks.py to exit after WORKEND
While the config script will still function without exiting the SimLoop
after the "WORKEND" exit event, there's no need for the simulation to
continue beyond this point.

Change-Id: I60691215e9516fa1eeb8b8502f2bc5a09de2969b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66513
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-12-07 18:56:09 +00:00
Bobby R. Bruce
a23641e01f configs: Fix x86-gapbs-benchmarks.py example
With https://gem5-review.googlesource.com/c/public/gem5/+/64791 we
updated the configs/example/gem5_library to utilize the `m5.simulate`
module. The GAPBS benchmark example uses the "WORKBEGIN" and "WORKEND"
exit events to specify the ROI. The patch incorrectly assumed an "EXIT"
exit event were used.

As such, the
"test-gem5-library-example-x86-gapbs-benchmarks-ALL-x86_64-opt-MESI_Two_Level"
test was not properly running, causing the Nightly test to fail:
https://jenkins.gem5.org/job/nightly/444. This patch fixes this error.

Change-Id: I207fe3563c8d9c59bcb79428fe62d2d2bbccd013
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66512
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-12-07 18:56:09 +00:00
Melissa Jost
da83764f94 stdlib, configs: Updating configs/example/gem5_library
This commit updates all of the older tests in this directory to
use the Simulator to run instead of m5.simulate()

Change-Id: I2a81d5c2f27c89e8c03abb0203ca3e58a6688672
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64791
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-12-02 06:04:53 +00:00
Bobby R. Bruce
5794643e44 configs,stdlib,tests: Update riscvmatched-fs.py to-init
The "test-gem5-library-example-riscvmatched-fs" test, which runs
"configs/example/gem5_library/riscvmatched-fs.py", was running the
script in full. This takes a very long time. Given we already have boot
tests for RISCV, it's better to just run this configuration to just the
end of the Linux boot (significantly faster than a full OS boot). This
patch adds this feature to the config script and modifies the test to
utilize it.

Change-Id: I1e37a26aab5e9a127ebd64590be79fbc16fe53aa
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65853
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-22 05:53:43 +00:00
Bobby R. Bruce
36f2964d19 configs,stdlib: Fix import in riscvmatched-fs.py
Change-Id: I2ff4139457d32336f40c6655231064a12c4d8694
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65852
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2022-11-22 05:53:43 +00:00
Bobby R. Bruce
00c2f09bd9 stdlib,configs: Update riscvmatched-fs example docstring
This documentation string provided in the
"config/example/gem5_library/riscvmatched-fs.py" was minimal. This patch
adds more detail.

Change-Id: I0f203ea6952fc72a078594d7c30853bd426017ff
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65851
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-11-22 05:53:43 +00:00
Bobby R. Bruce
c88b528738 stdlib: Update AbstractCore's 'set_inst_stop_any_thread'
This patch:
- Makes this function private.
- Updates the function's documentation.
- Changes the 'init' parameter to 'board_initialized'.

It doesn't make much sense for this function to be exposed directly to
the user as it requires knowing whether the board is initialized or not.

In addition to this I believe it makes more sense for the 'init' logic
to be flipped and renamed "board_initialized' so that this value is True
if the board has been initialized.

The documentation for this function has been updated.

Change-Id: I016c65bde88357111d3e648d7aa99aeb6e31f410
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64833
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-04 18:04:54 +00:00
Bobby R. Bruce
8ffecdd966 stdlib,configs,tests: Rename config to arm-ubuntu-run.py
The "config/example/gem5_library/arm-ubuntu-boot-exit.py" script is
renamed to "config/example/gem5_library/arm-ubuntu-run.py". This makes
it more consistent with similar scripts in the
"config/example/gem5_library" directory: "x86-ubuntu-run.py" and
"riscv-ubuntu-run.py".

Change-Id: I9d96fd68e122f2841573b1717b0969cd44972771
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65132
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2022-11-01 18:57:36 +00:00
Bobby R. Bruce
25d4fb2d91 stdlib: Move _connect_things to run as pre_instantiation
Through working with the gem5 stdlib there have been instances where
connecting the memory, processor, and cache hierarchy to the board (via
the AbstractBoard's `_connect_things` function) at the point of the
AbstractBoard's construction is problematic as the memory, processor,
and cache hierarchy may require information to connect correctly that is
only known to the AbstractBoard after construction. In particular this
can occur when a Workload contains information needed to configure
correctly.

To resolve this problem the `_connect_things` function has been moved to
run as a pre-initialization step. That is, run immediately before
`m5.instantiate`. This is done in the Simulator module.

This will break cases where a user utilizes the stdlib AbstractBoard but
does not use the stdlib Simulator module. As such, an Exception is
raised in these cases explaining the fix to the user. This is done via a
hack where the boards' `createCCObject` function (inheritted
from SimObject) is overriden with a check to ensure `_connect_things`
has been run. To fix the `_pre_instantiate` function must be executed
prior to `m5.instantiate` in the Python configuration script. Test and
config scripts in the gem5 repo have been updated accordingly.

Change-Id: Ibaef36eb7433ce104b861b1da80fc600f08f715a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65051
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-11-01 18:57:36 +00:00
Kaustav Goswami
75c1df0d06 stdlib,arch-arm: Add ruby cache support to the ArmBoard
This change adds ruby cache support to the ArmBoard. Previously
only classic caches were supported by the ArmBoard. The ArmBoard
was tested with CHI, MESI_Two_Level and MI_example caches from
the gem5's stdlib.

Change-Id: I480fe6ae13e3bd8438a425548ed113d443fcee40
Signed-off-by: Kaustav Goswami <kggoswami@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64011
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-11-01 18:57:36 +00:00
Bobby R. Bruce
3ab6a7496b stdlib: Move setting of checkpoints to set_workload funcs
It never made much sense to set checkpoint via the Simulator module as
Checkpoints are very tightly coupled with the Workload being run. This
change therefore moves the checkpoint to the set_workload functions.

Setting checkpoints via the Simulator is deprecated and will be removed
in a future release.

Change-Id: I24d2133b38a86423d3553ec888c917c5fe47b93d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64571
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-10-28 00:16:44 +00:00
Melissa Jost
ceac4b8f1a stdlib,configs: Update simpoint example to use the Workload
With the inclusion of the "x86-print-this-15000-with-simpoints"
workloads (introduced here:
https://gem5-review.googlesource.com/c/public/gem5-resources/+/64531)
This patch utilizes this workload for the simpoint examples.

Change-Id: I5e2c4a48206fd7108a33a4a64ac64235ea9f1f33
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64552
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-10-28 00:16:44 +00:00
Bobby R. Bruce
36e5feb0de stdlib: add 'get_simpoint' function to se_binary_workload.py
This function is necessary to obtain the workload from a board once set.
This is a stop-gap solution to get SimPoints working with SE workloads
but will need revision when implementing this functionality for FS.

Change-Id: Ided2b1a5867655a98730879524e0be61c3f20295
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64551
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Melissa Jost <mkjost@ucdavis.edu>
2022-10-28 00:16:44 +00:00
Melissa Jost
f1be0c808a stdlib: Added set_se_simpoint_workload to SEBinaryWorkload
Change-Id: I815d4aff655e96619a44fc6fc04b674a794056a2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64432
Reviewed-by: Melissa Jost <mkjost@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-10-28 00:16:44 +00:00
Jason Lowe-Power
dd4f3d1fa4 configs: Add example memory traffic runscript
This simple example shows how to use the test board to test the
bandwidth for an HBM2 pair of pseudo channels

Change-Id: I6235d0cb11909f5b4cc6442e419496c77425ba37
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64018
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2022-10-18 21:40:59 +00:00
Bobby R. Bruce
f59eb93660 tests: Add 'checkpoint-path' to simpoints stdlib example
The
'configs/example/gem5_library_checkpoints/simpoints-se-checkpoint.py'
example would dump the savepoint in the CWD. This is fine when running
as an example, but we also run this script as a test. In this case the
checkpoint litters the repository.

To fix this, an optional 'checkpoint-path' argument is added to this
example which specifies where the checkpoint is to be saved. In the
tests, the checkpoint is saved to 'tests/gem5/resources'. This is our
default location for resources needed/produced by tests and is ignored
by git.

Change-Id: I3dccc574b9e64d32386fd822ed7248ee365a0a08
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64092
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-10-04 21:31:51 +00:00
Bobby R. Bruce
64a087e5e8 tests: Add 'checkpoint-path' to checkpoint stdlib example
The
'configs/example/gem5_library_example_tests/test_gem5_library_examples.py'
example would dump the savepoint in the CWD. This is fine when running
as an example, but we also run this script as a test. In this case the
checkpoint litters the repository.

To fix this, an optional 'checkpoint-path' argument is added to this
example which specifies where the checkpoint is to be saved. In the
tests, the checkpoint is saved to 'tests/gem5/resources'. This is our
default location for resources needed/produced by tests and is ignored
by git.

Change-Id: Ib985433786c99c37794a1c67cc4337a5dfd0498d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64091
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2022-10-04 21:31:51 +00:00
Bobby R. Bruce
3e51091806 tests: Add Simpoints example scripts as tests
These both ensure these example scripts still work as intended and
provides tests for the stdlib Simpoint API.

Change-Id: I549c3d22458a5013a335857c83a4e78dc425e37d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63931
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-10-04 21:31:51 +00:00
paikunal
da5a4d3d8a stdlib, configs: Add example FS script for RISCV Matched
This script loads riscv-bootloader-vmlinux-5.10 onto a
riscv-ubuntu-20.04-img disk image on the RISCVMatched
prebuilt board found at
src/python/gem5/prebuilt/riscvmatched directory.

Change-Id: Ic2b4b19bac0a66d40d667b82a43c7791ff918847
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64014
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-10-03 22:27:59 +00:00
Jasjeet Rangi
b6a75cb8de stdlib, configs: Add example SE mode script for RISCV matched
This script runs the riscv-hello binary from gem5 resources on the
RISCV matched prebuilt board found in the
src/python/gem5/prebuilt/riscvmatched/ directory.

Change-Id: I1b527588b0319e9ab853dfcbfa381db2137d1a98
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63571
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
2022-09-23 04:42:23 +00:00
Bobby R. Bruce
3b0cb574f5 tests: Update tests to use ALL/gem5.opt compilation
Where possible the gem5 tests have been updated to use the
build/ALL/gem5.opt compilation.

If a quick test requied a specific a ISA/protocol compilation they
were moved to the long/nightly set. This means all the quick/kokoro
tests are run with the build/ALL/gem5.opt compilation.

The learning_gem5 tests have been updated to use ALL/gem5.opt.

The equivilant examples on the website have been updated via:
https://gem5-review.googlesource.com/c/public/gem5-website/+/63336

Change-Id: I533689ad6848233867bdba9e9a43bb5840ed65c7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63374
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-09-22 18:19:56 +00:00
Bobby R. Bruce
26ea5a1c72 configs: Fix "gem5.resource" typo in riscv-ubuntu-run.py
This was causing the Nightly tests to fail:
https://jenkins.gem5.org/job/nightly/348/

The import should be "gem5.resources.workload".

Change-Id: I0ecd181a3c1120c44ebd0683e2a62bdc602a75bd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63391
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-09-12 18:44:28 +00:00
Bobby R. Bruce
92ab557947 configs: Use "arm64-ubuntu-20.04-boot" workload for example
The ARM Ubuntu Boot example was using 18.04. This commit updates this
example script to use the "arm64-ubuntu-20.04-boot" workload, added
here:
https://gem5-review.googlesource.com/c/public/gem5-resources/+/62662

Change-Id: I9cee16f739a5fa9281041fde242b5cd37e5be20b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62665
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-09-08 17:40:11 +00:00
Bobby R. Bruce
bb60998aa9 configs,tests: Update tests/configs for RISCV boot workload
As of this commit:
https://gem5-review.googlesource.com/c/public/gem5-resources/+/62659
we have a RISCV Ubuntu 20.04 boot workload. This patch applies it to
test scripts and example scripts where appropriate.

Change-Id: Ibf9bed1a978b6d2e456b528f64cf3a9d6dc0e568
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62664
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-09-08 17:40:11 +00:00
Bobby R. Bruce
af4fd2f2c6 tests,configs: Update x86 boot tests/examples with Workload
As of this commit:
https://gem5-review.googlesource.com/c/public/gem5-resources/+/62658
there is an x86-ubuntu-18.04-boot workload.

Where appropriate tests and example scripts have been updated to use
this workload.

Change-Id: I7c9dc8e0e53b1d3f4c365f0382b5f5d4224436f7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62663
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-09-08 17:40:11 +00:00
Zhantong Qiu
07b693a186 stdlib, configs: stdlib SimPoints support and example scripts
simpoints-se-checkpoint.py & simpoints-se-restore.py:
These are two example scripts to show how to use SimPoints functions with
the stdlib.

se_binary_workload.py:
Allow se_binary_workload to take in SimPoint Class item and schedule
SimPoint exit events.

exit_event.py:
Added SIMPOINT_BEGIN and MAX_INSTS exit events.

simulator.py:
Added SIMPOINT_BEGIN and MAX_INSTS exit event scheduling functions.
They can schedule exit events before or during the simulation.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1259

Change-Id: Iaa07a83de9dddc293b9f1a230aba8e35d4f5af6c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/63154
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-09-07 02:20:08 +00:00
Jason Lowe-Power
74bdd087f9 configs: Fix stat names after switchable changes
b6e0e72d9 changed the names of the switchable processor cores. This
change updates the stats after the nightlies failed.

Change-Id: If349ff07dea08ad3999e02ee95da389bab903b3e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62791
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-08-28 14:04:23 +00:00
Bobby R. Bruce
2bc5a8b71a misc: Run pre-commit run on all files in repo
The following command was run:

```
pre-commit run --all-files
```

This ensures all the files in the repository are formatted to pass our
checks.

Change-Id: Ia2fe3529a50ad925d1076a612d60a4280adc40de
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62572
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2022-08-24 21:47:07 +00:00
Giacomo Travaglini
25d2a8366a configs: Enable EL3 in the arm-ubuntu-boot-exit example
EL3 (SECURITY) had been temporarily disabled to address the
FEAT_PAuth trapping issue.

This was caused by the EL3 bootloader not disabling pointer
authentication traps. Now that this has been implemented [1],
we should re-enable EL3 in this example platform

[1]: https://gem5-review.googlesource.com/c/public/gem5/+/61736

Change-Id: I62ee1dddc9b5d2d531f2603da7b2bccb23b3c9f0
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62271
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Kaustav Goswami <kggoswami@ucdavis.edu>
2022-08-11 08:18:03 +00:00
Gabe Black
3d7d426fa5 cpu: Generalize how register files are serialized.
Instead of explicitly serializing each type of register explicitly, and
using custom types, etc, store them as generic blocks of data. This lets
us get rid of the final use of TheISA::VecRegContainer and
TheISA::VecPredRegContainer.

Change-Id: I61dbd7825ffe35c41e1b7c8317590d06c21b4513
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50252
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2022-08-04 20:22:32 +00:00
Bobby R. Bruce
787204c92d python: Apply Black formatter to Python files
The command executed was `black src configs tests util`.

Change-Id: I8dfaa6ab04658fea37618127d6ac19270028d771
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47024
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-08-03 09:10:41 +00:00
Hoa Nguyen
02ed53ff6b stdlib,configs,tests: Examples of saving/restoring checkpoints
This change consists of two scripts,
- riscv-hello-save-checkpoint.py: runs the first million ticks of the
simulation and save a checkpoint.
- riscv-hello-load-checkpoint.py: loads the above checkpoint, and runs
the rest of the simulation.

This change also adds the two scripts as part of quick tests.

Change-Id: I7bd97ba953fab52f298cbbcf213f2ea5c185cc38
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58829
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
2022-06-08 21:51:52 +00:00
Kaustav Goswami
c6299cbe8e stdlib: Removed SECURITY from the ArmBoard Script
The ARM Board does not support SECURITY extension at the moment.
This change removes the extension from the config script so that
the board functions properly.

Change-Id: I12a5bdf48803e86739967830204a9eef6057bd36
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/60209
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-06-01 21:59:35 +00:00