Commit Graph

7 Commits

Author SHA1 Message Date
Gabe Black
89f2d5eb54 misc: Make many includes explicit.
A future change will adjust how some includes can be included
transitively. This change fixes up those files so that they include the
headers they need directly, instead of expecting to have them by
accident through other files.

Change-Id: I1f79aa11df2b46bb7018f39c964294c41db4fdac
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29407
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-06-03 19:42:46 +00:00
Gabe Black
bdb2820218 dev: Delete the authors list from files in src/dev.
Change-Id: I0907a6f1ada3038305c2d83a350a8d435ac657ba
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25403
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-02-18 03:34:01 +00:00
Andreas Sandberg
ef71a987c1 python: Don't assume SimObjects live in the global namespace
The importer in Python 3 doesn't like the way we import SimObjects
from the global namespace. Convert the existing SimObject declarations
to import from m5.objects. As a side-effect, this makes these files
consistent with configuration files.

Change-Id: I11153502b430822130722839e1fa767b82a027aa
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15981
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
2019-02-12 09:43:00 +00:00
Gabe Black
2bcb2b031d dev: Explicitly specify the endianness for packet accessors.
Generally speaking, the endianness of the data devices provide or
accept is dependent on the device and not the ISA the system
executes. This change makes the devices in dev pick an endianness
rather than using the guest's.

For the ISA bus and the UART, accesses are byte sized and so endianness
doesn't matter. The ISA and PCI busses and the devices which use them
are defined to be little endian.

Change-Id: Ib0aa70f192e1d6f3b886d9f3ad41ae03bddb583f
Reviewed-on: https://gem5-review.googlesource.com/c/13462
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-10-17 20:17:44 +00:00
Nikos Nikoleris
71c6a68a2f dev-arm: Fix the address range for some I/O devices
Previously, many devices were incorrecty configured to respond to an
address range of size 0xfff. This changes fixes this and sets it to
0x1000.

Change-Id: I4b027a27adf60ceae4859e287d7f34443b398752
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11116
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-06-15 10:51:28 +00:00
Andreas Sandberg
4e6241007c dev: Add missing SConscript in src/dev/i2c 2015-12-10 18:46:02 +00:00
Andreas Sandberg
ef097ac438 dev: Move i2c functionality to src/dev/i2c/
--HG--
rename : src/dev/I2C.py => src/dev/i2c/I2C.py
rename : src/dev/i2cbus.cc => src/dev/i2c/bus.cc
rename : src/dev/i2cbus.hh => src/dev/i2c/bus.hh
rename : src/dev/i2cdev.hh => src/dev/i2c/device.hh
2015-12-10 10:35:18 +00:00