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Author	SHA1	Message	Date
Gabe Black	479ca6a895	arm: Delete authors lists from the arm files. Change-Id: I6e9f5b70faebe5d279bff303c42f59a00a7845ec Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25447 Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com>	2020-02-18 03:35:23 +00:00
Gabe Black	54cf33fbf3	fastmodel: Pull out and simplify the interrupt mechanism in the GIC. This change pulls out the SPI and PPI command structures and replaces them with a custom protocol which can deliver a SPI or PPI without having to bundle their parameters into a structure. Change-Id: I8f15c8b3182bd6560bf5ef0345b0bc64173def85 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21042 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>	2019-10-01 22:08:49 +00:00
Gabe Black	e4050372b2	fastmodel: Add glue code which adapts fastmodels to run in gem5. Fast Models are models written by ARM which emulate different components of a computer system. They can be combined into small subsystems and then exported as systemc modules. To enable this code, you'll need to set USE_ARM_FASTMODEL variable to true. This CL does not include the fast models themselves, or a license to use them or the associated tools. To build these fast models, you'll need to set some scons variables. These variables should be set as described in the fast model distribution. * PVLIB_HOME * MAXCORE_HOME * ARMLMD_LICENSE_FILE Some minor patches to source filesdistributed with the fast model code may be necessary since their use of systemc is not necessarily 100% standards compliant. Change-Id: Id53814b95d8aa320da4d4f2159be0736fc12eb73 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20799 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>	2019-09-27 22:53:47 +00:00

Author

SHA1

Message

Date

Gabe Black

479ca6a895

arm: Delete authors lists from the arm files.

Change-Id: I6e9f5b70faebe5d279bff303c42f59a00a7845ec
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25447
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>

2020-02-18 03:35:23 +00:00

Gabe Black

54cf33fbf3

fastmodel: Pull out and simplify the interrupt mechanism in the GIC.

This change pulls out the SPI and PPI command structures and replaces
them with a custom protocol which can deliver a SPI or PPI without
having to bundle their parameters into a structure.

Change-Id: I8f15c8b3182bd6560bf5ef0345b0bc64173def85
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21042
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2019-10-01 22:08:49 +00:00

Gabe Black

e4050372b2

fastmodel: Add glue code which adapts fastmodels to run in gem5.

Fast Models are models written by ARM which emulate different
components of a computer system. They can be combined into small
subsystems and then exported as systemc modules.

To enable this code, you'll need to set USE_ARM_FASTMODEL variable to
true. This CL does not include the fast models themselves, or a license
to use them or the associated tools. To build these fast models, you'll
need to set some scons variables. These variables should be set as
described in the fast model distribution.

* PVLIB_HOME
* MAXCORE_HOME
* ARMLMD_LICENSE_FILE

Some minor patches to source filesdistributed with the fast model code
may be necessary since their use of systemc is not necessarily 100%
standards compliant.

Change-Id: Id53814b95d8aa320da4d4f2159be0736fc12eb73
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20799
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2019-09-27 22:53:47 +00:00

3 Commits