fastmodel: Pull out and simplify the interrupt mechanism in the GIC.

This change pulls out the SPI and PPI command structures and replaces
them with a custom protocol which can deliver a SPI or PPI without
having to bundle their parameters into a structure.

Change-Id: I8f15c8b3182bd6560bf5ef0345b0bc64173def85
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21042
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2019-08-27 17:20:30 -07:00
parent 791d7f4f41
commit 54cf33fbf3
8 changed files with 164 additions and 120 deletions

View File

@@ -28,50 +28,6 @@
* Chun-Chen TK Hsu
*/
protocol AMBAPVPPICommand
{
properties
{
sc_master_port_class_name =
"amba_pv::signal_master_port<FastModel::PPICommand>";
sc_slave_base_class_name =
"amba_pv::signal_slave_base<FastModel::PPICommand>";
sc_slave_export_class_name =
"amba_pv::signal_slave_export<FastModel::PPICommand>";
}
includes
{
#include <amba_pv.h>
#include "arch/arm/fastmodel/GIC/commands.hh"
}
slave behavior set_state(
int export_id, const FastModel::PPICommand &value);
}
protocol AMBAPVSPICommand
{
properties
{
sc_master_port_class_name =
"amba_pv::signal_master_port<FastModel::SPICommand>";
sc_slave_base_class_name =
"amba_pv::signal_slave_base<FastModel::SPICommand>";
sc_slave_export_class_name =
"amba_pv::signal_slave_export<FastModel::SPICommand>";
}
includes
{
#include <amba_pv.h>
#include "arch/arm/fastmodel/GIC/commands.hh"
}
slave behavior set_state(
int export_id, const FastModel::SPICommand &value);
}
component GIC
{
composition
@@ -410,13 +366,12 @@ component GIC
#define setPPI(C) \
case C: ppi_##C[num].setValue(state); \
break
slave port<AMBAPVPPICommand> ppi_command
slave port<SignalInterrupt> signal_interrupt
{
behavior set_state(int export_id, const FastModel::PPICommand &value)
behavior ppi(uint8_t cpu, uint32_t num, bool state_val)
{
sg::Signal::State state = value.state();
uint32_t num = value.num();
uint8_t cpu = value.cpu();
sg::Signal::State state =
state_val ? sg::Signal::Set : sg::Signal::Clear;
switch (cpu) {
setPPI(0); setPPI(1); setPPI(2); setPPI(3); setPPI(4);
@@ -475,7 +430,15 @@ component GIC
sc_assert(false);
}
}
behavior spi(uint32_t num, bool state_val)
{
sg::Signal::State state =
state_val ? sg::Signal::Set : sg::Signal::Clear;
spi[num].setValue(state);
}
}
// CPU-side connections
slave port<AMBAPVSignal> cnthpirq;
slave port<AMBAPVSignal> cnthvirq;
@@ -487,14 +450,6 @@ component GIC
slave port<AMBAPVSignal> pmuirq;
slave port<AMBAPVSignal> vcpumntirq;
slave port<AMBAPVSPICommand> spi_command
{
behavior set_state(int export_id, const FastModel::SPICommand &value)
{
spi[value.num()].setValue(value.state());
}
}
internal slave port<Signal> spi[988];
internal slave port<Signal> ppi_0[16];

View File

@@ -21,5 +21,6 @@ files
{
path = "GIC.lisa";
path = "${PVLIB_HOME}/etc/sglib.sgrepo";
path = "../protocol/SignalInterruptProtocol.lisa";
}
}

View File

@@ -30,7 +30,10 @@ Import('*')
if not env['USE_ARM_FASTMODEL'] or env['TARGET_ISA'] != 'arm':
Return()
ArmFastModelComponent(File('GIC.sgproj'), File('commands.hh'),
File('GIC.lisa')).prepare_env(env)
protocol_dir = Dir('..').Dir('protocol')
ArmFastModelComponent(File('GIC.sgproj'), File('GIC.lisa'),
protocol_dir.File('SignalInterruptProtocol.lisa')
).prepare_env(env)
SimObject('FastModelGIC.py')
Source('gic.cc')

View File

@@ -48,8 +48,7 @@ SCGIC::SCGIC(const SCFastModelGICParams &params,
pmuirqWrapper(pmuirq, params.name + ".pmuirq", -1),
vcpumntirqWrapper(vcpumntirq, params.name + ".vcpumntirq", -1)
{
ppiCommand.bind(ppi_command);
spiCommand.bind(spi_command);
signalInterrupt.bind(signal_interrupt);
set_parameter("gic.enabled", params.enabled);
set_parameter("gic.has-gicv3", params.has_gicv3);
@@ -315,25 +314,25 @@ GIC::getPort(const std::string &if_name, PortID idx)
void
GIC::sendInt(uint32_t num)
{
scGIC->spiCommand.set_state(0, SPICommand(num - 32, true));
scGIC->signalInterrupt->spi(num - 32, true);
}
void
GIC::clearInt(uint32_t num)
{
scGIC->spiCommand.set_state(0, SPICommand(num - 32, false));
scGIC->signalInterrupt->spi(num - 32, false);
}
void
GIC::sendPPInt(uint32_t num, uint32_t cpu)
{
scGIC->ppiCommand.set_state(0, PPICommand(cpu, num, true));
scGIC->signalInterrupt->ppi(cpu, num, true);
}
void
GIC::clearPPInt(uint32_t num, uint32_t cpu)
{
scGIC->ppiCommand.set_state(0, PPICommand(cpu, num, false));
scGIC->signalInterrupt->ppi(cpu, num, false);
}
} // namespace FastModel

View File

@@ -30,7 +30,8 @@
#ifndef __ARCH_ARM_FASTMODEL_GIC_GIC_HH__
#define __ARCH_ARM_FASTMODEL_GIC_GIC_HH__
#include "arch/arm/fastmodel/GIC/commands.hh"
#include <amba_pv.h>
#include "arch/arm/fastmodel/amba_ports.hh"
#include "dev/arm/base_gic.hh"
#include "params/FastModelGIC.hh"
@@ -57,8 +58,7 @@ class SCGIC : public scx_evs_GIC
public:
SCGIC(const SCFastModelGICParams &params, sc_core::sc_module_name _name);
amba_pv::signal_master_port<PPICommand> ppiCommand;
amba_pv::signal_master_port<SPICommand> spiCommand;
SignalInterruptInitiatorSocket signalInterrupt;
sc_gem5::ScInterfaceWrapper<IFACE_TYPE(cnthpirq)> cnthpirqWrapper;
sc_gem5::ScInterfaceWrapper<IFACE_TYPE(cnthvirq)> cnthvirqWrapper;

View File

@@ -27,3 +27,5 @@
Depends('ExportedClockRateControlProtocol.lisa',
'exported_clock_rate_control.hh')
Depends('SignalInterruptProtocol.lisa',
'signal_interrupt.hh')

View File

@@ -1,5 +1,5 @@
/*
* Copyright 2019 Google, Inc.
* Copyright 2019 Google Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
@@ -27,58 +27,21 @@
* Authors: Gabe Black
*/
#ifndef __ARCH_ARM_FASTMODEL_GIC_COMMANDS_HH__
#define __ARCH_ARM_FASTMODEL_GIC_COMMANDS_HH__
#include <cstdint>
#include "base/logging.hh"
#include "sg/SGSignal.h"
namespace FastModel
protocol SignalInterrupt
{
class PPICommand
{
private:
uint8_t _cpu;
uint32_t _num;
sg::Signal::State _state;
public:
PPICommand(uint8_t c, uint32_t n, bool set) :
_cpu(c), _num(n), _state(set ? sg::Signal::Set : sg::Signal::Clear)
includes
{
panic_if(_cpu > 255, "PPICommand CPU out of bounds");
panic_if(_num > 15, "PPICommand number out of bounds");
#include "arch/arm/fastmodel/protocol/signal_interrupt.hh"
}
properties
{
description = "Signal an interrupt from gem5.";
version = "1.0";
dso_safe = 0;
sc_slave_base_class_name = "SignalInterruptSlaveBase";
sc_slave_socket_class_name = "SignalInterruptTargetSocket";
}
PPICommand() : PPICommand(0, 0, false) {}
uint8_t cpu() const { return _cpu; }
uint32_t num() const { return _num; }
sg::Signal::State state() const { return _state; }
};
class SPICommand
{
private:
uint32_t _num;
sg::Signal::State _state;
public:
SPICommand(uint32_t n, bool set) :
_num(n), _state(set ? sg::Signal::Set : sg::Signal::Clear)
{
panic_if(_num > 987, "SPICommand number out of bounds");
}
SPICommand() : SPICommand(0, false) {}
uint32_t num() const { return _num; }
sg::Signal::State state() const { return _state; }
};
} // namespace FastModel
#endif // __ARCH_ARM_FASTMODEL_GIC_COMMANDS_HH__
slave behavior ppi(uint8_t cpu, uint32_t num, bool state);
slave behavior spi(uint32_t num, bool state);
}

View File

@@ -0,0 +1,121 @@
/*
* Copyright 2019 Google, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Gabe Black
*/
#ifndef __ARCH_ARM_FASTMODEL_PROTOCOL_SIGNAL_INTERRUPT_HH__
#define __ARCH_ARM_FASTMODEL_PROTOCOL_SIGNAL_INTERRUPT_HH__
#include <string>
#include <systemc>
#include <tlm>
struct SignalInterruptDummyProtocolType {};
class SignalInterruptFwIf : public virtual sc_core::sc_interface
{
public:
virtual ~SignalInterruptFwIf() {}
virtual void ppi(uint8_t cpu, uint32_t num, bool state) = 0;
virtual void spi(uint32_t num, bool state) = 0;
};
class SignalInterruptBwIf : public virtual sc_core::sc_interface
{
public:
virtual ~SignalInterruptBwIf() {}
};
class SignalInterruptSlaveBase : public SignalInterruptFwIf
{
public:
SignalInterruptSlaveBase(const std::string &name) {}
};
class SignalInterruptInitiatorSocket :
public tlm::tlm_base_initiator_socket<64, SignalInterruptFwIf,
SignalInterruptBwIf>
{
private:
SignalInterruptBwIf dummyBwIf;
public:
typedef tlm::tlm_base_initiator_socket<64, SignalInterruptFwIf,
SignalInterruptBwIf> Base;
using Base::bind;
using Base::operator();
SignalInterruptInitiatorSocket() : Base()
{
get_base_export().bind(dummyBwIf);
}
SignalInterruptInitiatorSocket(const char *name) : Base(name)
{
get_base_export().bind(dummyBwIf);
}
const char *
kind() const override
{
return "SignalInterruptInitiatorSocket";
}
std::type_index
get_protocol_types() const override
{
return typeid(SignalInterruptDummyProtocolType);
}
};
class SignalInterruptTargetSocket :
public tlm::tlm_base_target_socket<64, SignalInterruptFwIf,
SignalInterruptBwIf>
{
public:
typedef tlm::tlm_base_target_socket<64, SignalInterruptFwIf,
SignalInterruptBwIf> Base;
using Base::bind;
using Base::operator();
using Base::Base;
const char *
kind() const override
{
return "SignalInterruptInitiatorSocket";
}
std::type_index
get_protocol_types() const override
{
return typeid(SignalInterruptDummyProtocolType);
}
};
#endif // __ARCH_ARM_FASTMODEL_PROTOCOL_SIGNAL_INTERRUPT_HH__