Commit Graph

15872 Commits

Author SHA1 Message Date
Hoa Nguyen
d2fb5c047f ext: Link gem5 libelf to ext/libelf/libelf.a
Currently, gem5 might use system's libelf library instead of
the one compiled from ext/libelf.
This commit tells scons to use ext/libelf version.

JIRA: https://gem5.atlassian.net/browse/GEM5-756

Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Change-Id: I8dc4555c32a956e9f5249288c71982fa6a3678f7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33941
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-02 20:36:14 +00:00
Hoa Nguyen
21abaac89d ext: Revert "base: Use system libelf instead of ext"
This reverts commit bbb32ca1ef,
which tells scons to use the system's libelf instead of
ext/libelf.

Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Change-Id: I3bb3e62f2ef0fbc72983c221d5570edb4b35d157
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33940
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-02 20:36:14 +00:00
Hoa Nguyen
14f6c40797 ext: Revert "ext: remove libelf"
This reverts commit fa13042b5a,
which removes ext/libelf.

Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Change-Id: Id0ffb480fa5f5fe8faa4816d367b580ebe4c38d7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33939
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-02 20:36:14 +00:00
Mahyar Samani
dde093b283 mem,ext: Integrating DRAMSim3 with gem5
Adding DRAMSim3 source code to the gem5 source code, the original
code was taken from umd-memsys github at https://github.com/umd-memsys/

Change-Id: I32c982206f33b0acf2121f322d15baa064c412c4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31757
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-02 15:51:00 +00:00
Mahyar Samani
acd63fe5ac mem,ext: Fixed DRAMSim2 Integration
Fixed the way callbacks were used due to changes in
src/sim/callback.hh. Removed author line in SConsript.

Change-Id: I2c2b8dbe13e4f58680806126cd9cf209748e788a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33938
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-02 15:50:43 +00:00
Timothy Hayes
2427fc2c82 mem: Relax packet limit in packet queue
JIRA: https://gem5.atlassian.net/browse/GEM5-587

Change-Id: I4ac24bf18a0aff08a5b33c48179b882b27ef910c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30317
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-02 08:36:21 +00:00
Timothy Hayes
28fa7becc0 arch: Add uReset helper to UPCState
This allows to reset without advancing the pc

https://gem5.atlassian.net/browse/GEM5-587

Change-Id: Ied566f4cd5efed5eb500447d3f14388482435475
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30315
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
2020-09-02 08:30:11 +00:00
Timothy Hayes
b01b455537 arch, mem: Initial Hardware Transactional Memory implementation
Gem5 Hardware Transactional Memory (HTM)

Here we provide a brief note describing HTM support in Gem5 at
a high level.

HTM is an architectural feature that enables speculative concurrency in
a shared-memory system; groups of instructions known as transactions are
executed as an atomic unit. The system allows that transactions be
executed concurrently but intervenes if a transaction's
atomicity/isolation is jeapordised and takes corrective action. In this
implementation, corrective active explicitely means rolling back a
thread's architectural state and reverting any memory updates to a point
just before the transaction began.

This HTM implementation relies on--
(1) A checkpointing mechanism for architectural register state.
(2) Buffering speculative memory updates.

This patch is focusing on the definition of the HTM checkpoint (1)

The checkpointing mechanism is architecture dependent. Each ISA
leveraging HTM support can define a class HTMCheckpoint inhereting from
the generic one (GenericISA::HTMCheckpoint).

Those will need to save/restore the architectural state by overriding
the virtual HTMCheckpoint::save (when starting a transaction) and
HTMCheckpoint::restore (when aborting a transaction).

Instances of this class live in O3's ThreadState and Atomic's
SimpleThread.  It is up to the ISA to populate this instance when
executing an instruction that begins a new transaction.

JIRA: https://gem5.atlassian.net/browse/GEM5-587

Change-Id: Icd8d1913d23652d78fe89e930ab1e302eb52363d
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30314
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-02 08:30:11 +00:00
Gabe Black
21fdd4290b misc: Remove the "fault" parameter from syscall functions.
This parameter was never set or used, just plumbed everywhere,
occasionally with a dummy value. This change removes all of that
plumbing.

Change-Id: I9bc31ffd1fbc4952c5d3096f7f21eab30102300b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33277
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2020-09-02 03:30:20 +00:00
Bobby R. Bruce
1f01fa91f7 arch-arm,arch-x86: Added missing overrides
These overrides were missing, causing compilation errors when
compiling with clang 9. Noted here:
https://www.mail-archive.com/gem5-dev@gem5.org/msg35657.html

Change-Id: I6d09a0e57af3131b9172d01468d2cdcf4b444c5d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33817
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 23:21:51 +00:00
Nikos Nikoleris
9dd1dda146 sim: Add missing overrides in the *Fault classes
Change-Id: I7a74df78f0f85ccf7fd896f98b301c1f998c1497
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33777
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 23:17:01 +00:00
Gabe Black
e020184843 base: Make the Value stat's functor method accept lambdas.
This class can already accept a proxy variable and a "functor" which is
a pointer to either a function or an instance of a class with the ()
operator overloaded.

This change adds a FunctorProxy partial specialization which accepts
anything that can be used to construct a std::function<Result()>. The
constructor argument is copied and stored in the proxy which makes it
possible to define a lambda inline without having to keep a copy of it
around for the proxy to point to.

Also, the ValueBase stat's functor method now has a second version which
accepts a const reference rather than just a reference to its argument.
We need both because when accepting a reference to a lambda it needs to
be a const reference, but when accepting a pointer to a functor object,
we don't want it to be const because that would force the () operator to
also be const.

Change-Id: Icb1b3682d51b721f6e16614490ed0fe289cee094
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32901
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2020-09-01 21:57:34 +00:00
Gabe Black
f0e63088ab scons: Make scons aware of changes to cxx_type in param types.
If the cxx_type value changes, then the way the parameter is declared
in the param struct will also change, and the header needs to be
updated. scons would miss this sort of change before because it was only
checking the module the SimObject's source came from. The python names
and types of the parameters could stay the same, but the C++
representation might have changed because of edits somewhere else.

This CL assumes that cxx_type is the only thing that will change and
transparently affect the params struct. I tried making scons sensitive
to the entire ptype which would capture other parameters, but that
didn't work for some reason. This should be pretty safe in general, but
not 100% safe

Issue-on: https://gem5.atlassian.net/browse/GEM5-753
Change-Id: I06774889e60b987f727799f55d7ea2a775b6a319
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33695
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 21:55:50 +00:00
Gabe Black
52f5cd2f67 test: Fix unittest cprintftime's build.
This test, which measures the performance of cprintf vs. sprintf, was
missing a couple of includes which were needed for the alarm() and
signal() functions, as well as the SIGALRM constant.

Also, it was using %#x to print the value of a pointer which gcc
complained about when compiling sprintf. This is fixed by changing that
format specifier to %p, the specifier to use when printing pointers.
Apparently either the implicit conversion to an integer value (which %#x
expects) or the size of the type it was converted to weren't good enough
for gcc any more.

Change-Id: I8eca3479bef2c2fa79f8ef4881bb3ff35d7c54ca
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33897
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 21:53:42 +00:00
Gabe Black
e2fc29076a test: Remove refcnttest from the unittest SConscript.
The test itself was removed, but it was left in the SConscript. If you
tell scons to build everything in that directory, it will try to build
that test and fail.

Change-Id: I1e3923b0de12e891f53dab6f4e6e3e2b6975dc45
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33896
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 21:53:28 +00:00
Bobby R. Bruce
fd7d48ac19 arch-gcn3: Added missing header to hsa_driver.cc
`TypedBufferArg`, used in `src/dev/hsa/hsa_driver.cc` is defined in
`src/sim/syscall_emul_buf.hh` yet was not included. This commit adds
this missing header.

Change-Id: I3239a097eb71b6ebdad045eab6525a888a970f08
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33816
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 18:52:13 +00:00
Daniel R. Carvalho
79e83c7d95 mem-cache: Fix copy ellision on base compressor
Newer compiler versions have a problem with this move as
it prevents copy elision.

Change-Id: I802703df12e171d6a377b673d0ad7e202456b516
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33835
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 06:29:10 +00:00
Nikos Nikoleris
73fcbe4d6d arch: Remove unused variable pcbb from ThreadInfo
Change-Id: Ib9e46934f1613c98758662cba26a46fcc2a76146
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33776
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 06:25:28 +00:00
Nikos Nikoleris
6bd0a394c2 scons: Avoid the unsupported option -Wno-c99-designator in MacOS
Change-Id: I4d95c75915b17531bdd6d9161eb266bb91cd7bef
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33775
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 06:25:15 +00:00
Jason Lowe-Power
3a76c38d77 python: Import reduce function in FileSystemConfig
Not sure if this is required due to python3 or something else, but I got
the error "NameError: name 'reduce' is not defined". This fixes that
error.

Change-Id: I2dd71674306abcad1a90311664b18b9eee29b9ac
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32374
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-09-01 00:14:08 +00:00
Sampad Mohapatra
9d8229c0f1 mem-ruby: Change request to response in MOESI_AMD_Base-dir.sm
The responseToDMA MessageBuffer in MOESI_AMD_Base-dir.sm
transmits both data and acks, but it's vnet_type is currently
set as request. This should be changed to response.

Signed-off-by: Sampad Mohapatra <sampad.mohapatra@gmail.com>
Change-Id: I0eb9e8fc8e25111849605a710a5150ce5fc3b83b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33755
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 22:54:31 +00:00
Gabe Black
08ab457f13 scons: Remove the AddLocalOption workaround.
The "append" option of the Help() scons method can be used to avoid
clobbering the built in and local option help.

This has the nice side effect of making it easier to add options in
other files since you now only need the built in AddOption provided by
scons itself, not the custom AddLocalOption version.

Change-Id: Ifa566087797d578df0c90f8f4fca70c8152fbf63
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32115
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Gabe Black <gabeblack@google.com>
2020-08-31 21:31:12 +00:00
Daniel R. Carvalho
c0d67b2263 mem-cache: Use cache's max CR on perfect compressor
Use cache's max_compression_ratio to setup the max_compression_ratio
of the PerfectCompressor.

Change-Id: Ib44aa61975fb2cc52f27f64a86c9df9c5531aa1a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33387
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
8626fe101d mem-cache: Explicitly define threshold of BDI's sub-compressors
Allow all sub-compressors of BDI to be successful as long as
they are able to compress. Then, BDI's actual size threshold
acts as the cutting point.

This situation arises on any multi compressor; yet, generalizing
this assumption might be too bold.

Change-Id: Iec5057d16d4a7ba5fb573133a30ea10869bd67e0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33386
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
605a0917bb mem-cache: Make compression size threshold a percentage
By changing the parameter into a percentage, changing the block
size will automatically reconfigure the size threshold. Also,
change the default percentage to 50% to avoid storing blocks
unlikely to co-allocate in compressed format.

Change-Id: I1458f19db39becc2d40c00269132fea01770016f
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33385
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
bc92a06cf5 mem-cache: Add stats for failed compressions
Add statistics to keep track of the number of times compression
has failed to provide blocks whose compressed size passes the
size threshold.

Also, update the compressed data's size if compression fails.

Change-Id: If3479572bf114f07911238c602ffef3a90b6a931
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33384
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
53ef7c1e6c mem-cache: Handle zero sizes on compression
The size can be zero in special occasions, which would
generate divisions by zero. This patch expands the
stats to support them. It also fixes the compression
factor calculation in the Multi compressor.

As a side effect, now that zero sizes are handled, allow
the Zero compressor to generate it.

Change-Id: I9f7dee76576b09fdc9bef3e1f3f89be3726dcbd9
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33383
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
58c7fc72d3 mem-cache: Add an extra decomp lat to multi compressor
There is extra hardware required when dealing with multi
compressors. As such, add a parameter to allowing increasing
their decompression latency to account for any extra delay.

Change-Id: I153e4c5ab6927ac092e2ebd767fe88974597bb20
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33382
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
99a8c5a27a mem-cache: Store BDI's encoding in tags
According to the original paper the compressors' encodings are
stored in the tag-store (Storage cost analysis section).

Change-Id: I4c34f86022eea6d1ba0ae29dd74d5714bbad367a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33381
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
35f77329e8 mem-cache: Add encoding bits to the data of multi compressors
When compressing using a multi-compressor, one must be able to
identify which sub-compressor should be used to decompress data.
This can be achieved by either adding encoding bits to block's
tag or data entry.

It was previously assumed that these encoding bits would be added
to the tag, but now make it a parameter that defaults to the data
entry.

Change-Id: Id322425e7a6ad59cb2ec7a4167a43de4c55c482c
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33380
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
de94a29f85 mem-cache: Standardize data parsing in compressors
The compressors are not able to process a whole line at once,
so they must divide it into multiple same-sized chunks. This
patch makes the base compressor responsible for this division,
so that the derived classes are mostly agnostic to this
translation.

This change has been coupled with a change of the signature
of the public compress() to avoid introducing a temporary
function rename. Previously, this function did not return
the compressed data, under the assumption that everything
related to the compressed data would be handled by the
compressor. However, sometimes the units using the compressor
could need to know or store the compressed data.

For example, when sharing dictionaries the compressed data
must be checked to determine if two blocks can co-allocate
(DISH, Panda et al. 2016).

Change-Id: Id8dbf68936b1457ca8292cc0a852b0f0a2eeeb51
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33379
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
3fc4c0a415 mem-cache: Allow inheriting from DitionaryCompressor's comp data
Previously either the compression data was the one declared within
DictionaryCompressor, or the derived class would have to override
the compress() to use a derived compression data.

With this change, the instantiation can be overridden, and thus
any derived class can choose the compression data pointer type
they need to use.

Change-Id: I387936265a3de6785a6096c7a6bd21774202b1c7
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33378
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
8bb0e3749b mem-cache: Upgrade Compressor::Multi's stats
Use new style stats API for Compressor::Multi's stats.

Change-Id: Ia0313704cae4e7bd6bc675c71ea75b42a8e542f2
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33377
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
c85c793499 mem-cache: Upgrade BaseDictionaryCompressor's stats
Upgrade this compressor's stats to match current stats API.

Change-Id: I1cb69230f8deca053bc860cedafc9e6e78446df7
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33376
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
0658b53e93 mem-cache: Fix RepeatedQwords compressor
This compressor does not allocate dictionary entries when there
is a match. This was causing the compressor to always fail.

Change-Id: I50eb56fa284854f3ee87f33af2c6e0a5c5248d7c
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33375
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Daniel R. Carvalho
9e7dbd0544 mem-cache: Fix integer promotion of mask
When applying the bitwise not to a short integer the compiler
automatically promotes it to an integer. For example, if a 8-bit
mask=0xFF, and the compiler decides to promote the mask to 32-bit
to apply the bitwise not, ~mask=0xFFFFFF00, which will yield wrong
results for popcount(): expected=0, got=24.

Change-Id: I95efba5532c27ca004ff6947d4b51a8a14f09741
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33374
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:45:43 +00:00
Kyle Roarty
b00b986353 misc: Use VPtr in hsa_driver.cc
This change updates HSADriver::allocateQueue to take in a ThreadContext
pointer as opposed to a PortProxy ref. This allows the TypedBufferArg
to be replaced with VPtr.

This also fixes building GCN3_X86

Change-Id: I1fea26b10c7344daf54a0cb05337e961f834a5fd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33655
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 17:44:11 +00:00
eavivi
9547cd285c mem: convert base prefetcher and queued to new style stats
Base and Queued inside src/mem/cache/prefetch converted

Change-Id: I3d5907b58efefc4d8522b89f073507f2548bff2f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33475
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 16:36:53 +00:00
Nathanael Premillieu
82f881255d base: avoid recreating socket at each call to listen()
A new socket was created each time listen() is called,
which is problematic when the bind or listen operation
on it are not successful (mostly because the associated port is
already in use). It can lead gem5 to open too many files and crash
for multicores configurations, a socket being created
for remote GDB for each core. The other way to deal with
this problem would be to close the socket in the case the
function return false. But I find the proposed solution
simpler.

Change-Id: I848955a10c89e1da033bf773c83556a5dc5ef9a2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32994
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 07:36:24 +00:00
Gabe Black
5abb19c89b scons: Set the minimum scons version to 3.0.
Change-Id: Id57a93e819588d2231d2d2d8b28cd62b05fbbe9b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33675
Reviewed-by: Steve Reinhardt <stever@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-31 01:18:01 +00:00
Kyle Roarty
e111ccaf70 configs: Add parameter for GPU scalar cache mandatory queue size
There was a missing option (--buffers-size) used to set the mandatory
queue size for the scalar controllers. This patch renames the option to
be more clear, and adds it to the argument parser.

Default of 128 taken from the implementation on the GCN staging branch

Change-Id: I58b6b57be07498cdf6e39c0bb85982674ec4caa6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32676
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-30 01:02:16 +00:00
Kyle Roarty
6276d4ea6c misc: Fix db_offset calculation
db_offset used to be calculated through pointer arithmetic. Pointer
arithmetic increments the address by the size of the data type the
pointer is pointing at. In the previous db_offset calculation, that
was a uint32_t, which means the input was multiplied by 4, which is
sizeof(uint32_t)

This patch multiplies the input value by sizeof(uint32_t) before
assigning it to db_offset.

Change-Id: I9042560303ae6b8b1054b98e9a16a9da27843bb2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32678
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-29 01:49:49 +00:00
Kyle Roarty
796d54e63b configs: set hsaTopology properties from options
This change sets the properties in hsaTopology to the proper values
specified by the user through command-line arguments. This ensures
that if the properties file is read by a program, it will return
the correct values for the simulated hardware.

This change also adds in a command-line argument for the lds size, as
it was the only other property used in hsaTopology that didn't have
a command-line argument. The default value (65536) is taken from
src/gpu-compute/LdsState.py

Change-Id: I17bb812491708f4221c39b738c906f1ad944614d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31995
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-29 01:49:37 +00:00
Jason Lowe-Power
fa13042b5a ext: remove libelf
Change-Id: I52eb9a7bb7d9f3522ff565498dc2821a0d1ed0d6
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33318
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-08-28 19:54:43 +00:00
Jason Lowe-Power
bbb32ca1ef base: Use system libelf instead of ext
The only change needed is to remove EM_SPARC64, which from what I can
tell was removed from elf.h in 1998.

https://sources.debian.org/src/glibc/2.24-11+deb9u1/ChangeLog.8/#L6134

Change-Id: I0dd7e23ea44b19c2ebd9c6eff7cbaedfe69d821b
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33317
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabeblack@google.com>
2020-08-28 19:54:31 +00:00
Bobby R. Bruce
0cf67fb362 util: Updated Dockfiles with the libelf-dev dep
This is required if we eventually remove `ext/libelf` (
https://gem5.atlassian.net/browse/GEM5-752), otherwise our tests will
fail.

The corresponding Docker images have been built and uploaded to:
https://gcr.io/gem5-test/

Change-Id: I1bd069dfb968b56eac4c4da33929b5ff895eaa6f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33596
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 19:03:57 +00:00
Bobby R. Bruce
35997b28e3 util: Added GCN-GPU to cloudbuild_create_images
This adds the GCN-GPU Docker image to this cloudbuild yaml file. We
use this file to create our Docker images:

```
gcloud builds submit --config \
util/cloudbuild/cloudbuild_create_images.yaml
```

The GCN-GPU docker image can be obtained at:
https://gcr.io/gem5-test/gcn-gpu

Change-Id: I7564db78a9f00507f5acc6cf6098de35f98b6fb1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33595
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 19:03:57 +00:00
Richard Cooper
229f955f6f configs: Update starter_fs.py for latest Arm FS binaries.
Updated the default kernel and root device names to match the latest
Arm full-system binaries available for download on the gem5 website.

Also added a command line option to allow the root device to be
specified as an optional command line argument.

Change-Id: I27f90ffaf0f4b35c5dcc4c22ac2fbd34f8a040a4
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30814
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 18:58:08 +00:00
Giacomo Travaglini
8fceff60c4 arch-arm: Fix coding style in addressTranslation methods
armFault -> arm_fault

Change-Id: I6263b105f8757b34dd15a06b16abe7289073614d
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33434
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 14:05:59 +00:00
Giacomo Travaglini
b50d61fb9f arch-arm: Check if PAC is implemented before executing insts
If Armv8.3-PAuth (PAC) extension is not supported, most instrucions
will trigger an Undefined Instruction fault; except for a group of
them living in the HINT space; those should be treated as NOP.

Change-Id: Idec920ed15e0310ec9132a3cb3701cdb7e7cf9d1
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33455
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-08-28 09:40:21 +00:00