Commit Graph

5 Commits

Author SHA1 Message Date
Bobby R. Bruce
298119e402 misc,python: Run pre-commit run --all-files
Applies the `pyupgrade` hook to all files in the repo.

Change-Id: I9879c634a65c5fcaa9567c63bc5977ff97d5d3bf
2023-10-10 21:47:07 -07:00
Bobby R. Bruce
787204c92d python: Apply Black formatter to Python files
The command executed was `black src configs tests util`.

Change-Id: I8dfaa6ab04658fea37618127d6ac19270028d771
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47024
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2022-08-03 09:10:41 +00:00
Gabe Black
afee6296b5 util: Add a fallback when checking for root.isa in checkpoints.
The upgraders in util/cpt_upgraders have been able to check the
root.isa element of checkpoints to determine what "the" ISA is for a
simulation, as a quick way to bail out of that particular updater
applies only to specific ISAs. We are moving away from the idea that
there is a single ISA, and so this mechanism will no longer work.

Fortunately, these cpt_upgraders are only relevant for old checkpoints.
If a checkpoint doesn't have a root.isa element inside it at all, we
know (as of this writing) that it is newer than all of these upgraders
and hence they do not apply. Any new upgraders will have to be written
to not rely on the root.isa field which will be removed. If that sort
of field is still needed, it can be added somewhere else in the
hierarchy, perhaps at the system level, or as part of the actual ISA
object.

The simplest way to implement this new behavior is to add a fallback
option when an upgrader looks for root.isa, specifically ''. If the
root.isa element does not exist, the script will get '' back, and this
will not match whatever ISA it's trying to check against. The one even
remotely more complicated script is isa-is-simobject.py which has
several behaviors for different ISAs. In that case, we just explicitly
check for '' and return early if that's what we found.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1056

Change-Id: Ie78deccb2bac51f38224e62a28dd733cefd63ed7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48883
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-07-31 09:56:40 +00:00
Gabe Black
52b3f58a8c util: Delete authors lists from files in util.
Change-Id: I2a165d3130c1464a73823046e4c7b03ba0355459
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25457
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2020-02-18 10:24:43 +00:00
Karthik Sangaiah
6fa936b021 dev, arm: Add gem5 extensions to support more than 8 cores
Previous ARM-based simulations were limited to 8 cores due to
limitations in GICv2 and earlier. This changeset adds a set of
gem5-specific extensions that enable support for up to 256 cores.

When the gem5 extensions are enabled, the GIC uses CPU IDs instead of
a CPU bitmask in the GIC's register interface. To OS can enable the
extensions by setting bit 0x200 in ICDICTR.

This changeset is based on previous work by Matt Evans.
2015-09-18 16:49:28 +01:00