Commit Graph

8 Commits

Author SHA1 Message Date
Adrian Herrera
4732b6cdb7 misc: Reflect changes of arm bootloader name
With https://gem5-review.googlesource.com/c/public/gem5/+/22687 the
VExpress_GEM5_Base platform is changing the required bootloader name
by removing the _emm suffix.
While this had been changed in the prebuilt binaries in gem5.org, it
hadn't in the bootloader makefiles or in other utility functions.

The patch is not completely removing the _emm bootloaders since those
are still used by VExpress_EMM and VExpress_EMM64 platforms.

Change-Id: Iea3148eab313ab06cf2e74660e11708e1a22ce5f
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-by: Adrian Herrera <adrian.herrera@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23947
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-01-07 16:32:44 +00:00
Bertrand Marquis
c3686edebf system-arm: Rework boot loader makefile to be more generic
add all, clean and install rules
use variables for CROSS_COMPILE, CC, LD, DESTDIR
use generic rules to produce objects and link

Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
[ciro.santilli@arm.com: Also add BUILDDIR and to allow fully
 out-of-tree builds.]
Signed-off-by: Ciro Santilli <ciro.santilli@arm.com>
Change-Id: Id84bc6a8e5dde409b6fb968925ca268376730196
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22823
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2019-11-20 13:36:34 +00:00
Chun-Chen TK Hsu
e1a9794651 system-arm: Initialize ICC_SRE_EL3 register of all CPUs
Fix a bug that only CPU0 initialized ICC_SRE_EL3 register.

Change-Id: I625c9a25bada80b864e5eb5a8b8be14ee324b801
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21539
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
2019-10-09 03:45:47 +00:00
Chun-Chen TK Hsu
5bb6210b10 system-arm: Initialize ICC_SRE_EL3 register
Fast model CPU will throw exceptions if ICC_SRE_EL3 is not initialized
before accessing other interrupt controller system registers.

Change-Id: I638f77aa7a3a4ad92abf2554d039c37601fbd44f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19649
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-07-30 09:20:54 +00:00
Jairo Balart
761a5806fb system-arm: Add aarch64 bootloader support for GICv3
Change-Id: If75262709868cc59d320f60273a32397339f1dd5
Signed-off-by: Jairo Balart <jairo.balart@metempsy.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13435
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2019-01-07 22:29:03 +00:00
Jose Marinho
463a4bb6cd system-arm: change system/arm/aarch64_bootloader/boot.S copyright
The aarch64 boot loader was distributed using a BSD license that was
using non-standard formatting. Updated the license to match gem5's
canonical license format and removed the separete LICENSE.txt file.

Change-Id: I660b73ca5ddd922763a2b72051c73d539248ebcf
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5728
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-11-16 16:41:42 +00:00
Karthik Sangaiah
47326f5422 arm: Bootloader fix for v8 over 16 cores
Previous code used a smaller 4 bit mask to test the MPIDR-EL1 register.
The bitmask was extended to support greater than 16 cores.
2015-07-15 14:43:35 +01:00
ARM gem5 Developers
612f8f074f arm: Add support for ARMv8 (AArch64 & AArch32)
Note: AArch64 and AArch32 interworking is not supported. If you use an AArch64
kernel you are restricted to AArch64 user-mode binaries. This will be addressed
in a later patch.

Note: Virtualization is only supported in AArch32 mode. This will also be fixed
in a later patch.

Contributors:
Giacomo Gabrielli    (TrustZone, LPAE, system-level AArch64, AArch64 NEON, validation)
Thomas Grocutt       (AArch32 Virtualization, AArch64 FP, validation)
Mbou Eyole           (AArch64 NEON, validation)
Ali Saidi            (AArch64 Linux support, code integration, validation)
Edmund Grimley-Evans (AArch64 FP)
William Wang         (AArch64 Linux support)
Rene De Jong         (AArch64 Linux support, performance opt.)
Matt Horsnell        (AArch64 MP, validation)
Matt Evans           (device models, code integration, validation)
Chris Adeniyi-Jones  (AArch64 syscall-emulation)
Prakash Ramrakhyani  (validation)
Dam Sunwoo           (validation)
Chander Sudanthi     (validation)
Stephan Diestelhorst (validation)
Andreas Hansson      (code integration, performance opt.)
Eric Van Hensbergen  (performance opt.)
Gabe Black
2014-01-24 15:29:34 -06:00