misc: Replace M5_VAR_USED with GEM5_VAR_USED.

Change-Id: I64a874ccd1a9ac0541dfa01971d7d620a98c9d32
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45231
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>

src/mem/cache/base.cc

@@ -896,7 +896,7 @@ BaseCache::updateCompressionData(CacheBlk *&blk, const uint64_t* data,
 
     // Get previous compressed size
     CompressionBlk* compression_blk = static_cast<CompressionBlk*>(blk);
-    M5_VAR_USED const std::size_t prev_size = compression_blk->getSizeBits();
+    GEM5_VAR_USED const std::size_t prev_size = compression_blk->getSizeBits();
 
     // If compressed size didn't change enough to modify its co-allocatability
     // there is nothing to do. Otherwise we may be facing a data expansion
@@ -2418,7 +2418,7 @@ BaseCache::CpuSidePort::recvTimingReq(PacketPtr pkt)
     if (cache->system->bypassCaches()) {
         // Just forward the packet if caches are disabled.
         // @todo This should really enqueue the packet rather
-        M5_VAR_USED bool success = cache->memSidePort.sendTimingReq(pkt);
+        GEM5_VAR_USED bool success = cache->memSidePort.sendTimingReq(pkt);
         assert(success);
         return true;
     } else if (tryTiming(pkt)) {

src/mem/cache/cache.cc

@@ -449,7 +449,7 @@ Cache::recvTimingReq(PacketPtr pkt)
         // this express snoop travels towards the memory, and at
         // every crossbar it is snooped upwards thus reaching
         // every cache in the system
-        M5_VAR_USED bool success = memSidePort.sendTimingReq(snoop_pkt);
+        GEM5_VAR_USED bool success = memSidePort.sendTimingReq(snoop_pkt);
         // express snoops always succeed
         assert(success);
 
@@ -992,7 +992,7 @@ Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing,
     // responds in atomic mode, so remember a few things about the
     // original packet up front
     bool invalidate = pkt->isInvalidate();
-    M5_VAR_USED bool needs_writable = pkt->needsWritable();
+    GEM5_VAR_USED bool needs_writable = pkt->needsWritable();
 
     // at the moment we could get an uncacheable write which does not
     // have the invalidate flag, and we need a suitable way of dealing
@@ -1394,7 +1394,7 @@ Cache::sendMSHRQueuePacket(MSHR* mshr)
         // prefetchSquash first may result in the MSHR being
         // prematurely deallocated.
         if (snoop_pkt.cacheResponding()) {
-            M5_VAR_USED auto r = outstandingSnoop.insert(snoop_pkt.req);
+            GEM5_VAR_USED auto r = outstandingSnoop.insert(snoop_pkt.req);
             assert(r.second);
 
             // if we are getting a snoop response with no sharers it

src/mem/cache/compressors/frequent_values.cc

@@ -141,7 +141,7 @@ FrequentValues::decompress(const CompressionData* comp_data, uint64_t* data)
                 // its corresponding value, in order to make life easier we
                 // search for the value and verify that the stored code
                 // matches the table's
-                M5_VAR_USED const Encoder::Code code =
+                GEM5_VAR_USED const Encoder::Code code =
                     encoder.encode(comp_chunk.value);
 
                 // Either the value will be found and the codes match, or the

src/mem/cache/tags/fa_lru.cc

@@ -110,7 +110,7 @@ void
 FALRU::invalidate(CacheBlk *blk)
 {
     // Erase block entry reference in the hash table
-    M5_VAR_USED auto num_erased =
+    GEM5_VAR_USED auto num_erased =
         tagHash.erase(std::make_pair(blk->getTag(), blk->isSecure()));
 
     // Sanity check; only one block reference should be erased