ARM: Make a base class for instructions that use only an immediate.

src/arch/arm/insts/misc.cc

@@ -143,6 +143,15 @@ MsrRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
     return ss.str();
 }
 
+std::string
+ImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+    std::stringstream ss;
+    printMnemonic(ss);
+    ccprintf(ss, "#%d", imm);
+    return ss.str();
+}
+
 std::string
 RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 {

src/arch/arm/insts/misc.hh

@@ -94,6 +94,19 @@ class MsrRegOp : public MsrBase
     std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
+class ImmOp : public PredOp
+{
+  protected:
+    uint32_t imm;
+
+    ImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
+             uint32_t _imm) :
+        PredOp(mnem, _machInst, __opClass), imm(_imm)
+    {}
+
+    std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+};
+
 class RegRegOp : public PredOp
 {
   protected:

src/arch/arm/isa/templates/misc.isa

@@ -99,6 +99,25 @@ def template MsrImmConstructor {{
     }
 }};
 
+def template ImmOpDeclare {{
+class %(class_name)s : public %(base_class)s
+{
+  protected:
+    public:
+        // Constructor
+        %(class_name)s(ExtMachInst machInst, uint32_t _imm);
+        %(BasicExecDeclare)s
+};
+}};
+
+def template ImmOpConstructor {{
+    inline %(class_name)s::%(class_name)s(ExtMachInst machInst, uint32_t _imm)
+        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm)
+    {
+        %(constructor)s;
+    }
+}};
+
 def template RegRegOpDeclare {{
 class %(class_name)s : public %(base_class)s
 {