Update configuration

configs/example/gem5_library/arm-baremetal.py

@@ -22,8 +22,6 @@ from gem5.components.cachehierarchies.classic.no_cache import NoCache
 cache_hierarchy = PrivateL1PrivateL2CacheHierarchy(
     l1d_size="16kB", l1i_size="16kB", l2_size="256kB"
 )
-# cache_hierarchy = NoCache()
-
 memory = DRAMSysHBM2(recordable=True)
 processor = SimpleProcessor(cpu_type=CPUTypes.O3, num_cores=1, isa=ISA.ARM)
 release = ArmDefaultRelease()
@@ -50,7 +48,7 @@ board.m5ops_base = 0x10010000
 workload = CustomWorkload(
     "set_baremetal_workload",
     {
-        "kernel": BinaryResource("pim-os"),
+        "kernel": BinaryResource("kernels/gemv"),
     },
 )
 board.set_workload(workload)

configs/example/gem5_library/arm-hello.py

@@ -43,7 +43,7 @@ scons build/ARM/gem5.opt
 
 from gem5.isas import ISA
 from gem5.utils.requires import requires
-from gem5.resources.resource import Resource
+from gem5.resources.resource import BinaryResource
 from gem5.components.memory import SingleChannelDDR3_1600
 from gem5.components.processors.cpu_types import CPUTypes
 from gem5.components.boards.simple_board import SimpleBoard
@@ -84,7 +84,7 @@ board.set_se_binary_workload(
     # Any resource specified in this file will be automatically retrieved.
     # At the time of writing, this file is a WIP and does not contain all
     # resources. Jira ticket: https://gem5.atlassian.net/browse/GEM5-1096
-    Resource("arm-hello64-static")
+    BinaryResource("physical")
 )
 
 # Lastly we run the simulation.

ext/dramsys/SConscript

@@ -50,7 +50,7 @@ subprocess.run(
         "-DCMAKE_BUILD_TYPE=Release",
         f"-DSCONS_SOURCE_DIR:STRING={scons_root}",
         "-DDRAMSYS_BUILD_CLI=OFF",
-        "-DDRAMSYS_SHARED_PIM_UNITS=OFF"
+        "-DDRAMSYS_SHARED_PIM_UNITS=ON"
     ],
     check=True
 )