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dev: Rename TxdOp namespace as txd_op

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As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

iGbReg::TxdOp became iGbReg::txd_op.

Change-Id: I737205a3d29ffc0d96da72ba9fc6829939970957
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45386
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
This commit is contained in:
Daniel R. Carvalho
2021-05-06 07:08:54 -03:00
committed by Daniel Carvalho
parent a498fb3551
commit f317fbdb75
2 changed files with 49 additions and 45 deletions
Download Patch File Download Diff File Expand all files Collapse all files

86
src/dev/net/i8254xGBe.cc
View File

@@ -1519,7 +1519,7 @@ IGbE::TxDescCache::processContextDesc()
DPRINTF(EthernetDesc, "Checking and processing context descriptors\n");
while (!useTso && unusedCache.size() &&
TxdOp::isContext(unusedCache.front())) {
txd_op::isContext(unusedCache.front())) {
DPRINTF(EthernetDesc, "Got context descriptor type...\n");
desc = unusedCache.front();
@@ -1528,19 +1528,19 @@ IGbE::TxDescCache::processContextDesc()
// is this going to be a tcp or udp packet?
isTcp = TxdOp::tcp(desc) ? true : false;
isTcp = txd_op::tcp(desc) ? true : false;
// setup all the TSO variables, they'll be ignored if we don't use
// tso for this connection
tsoHeaderLen = TxdOp::hdrlen(desc);
tsoMss = TxdOp::mss(desc);
tsoHeaderLen = txd_op::hdrlen(desc);
tsoMss = txd_op::mss(desc);
if (TxdOp::isType(desc, TxdOp::TXD_CNXT) && TxdOp::tse(desc)) {
if (txd_op::isType(desc, txd_op::TXD_CNXT) && txd_op::tse(desc)) {
DPRINTF(EthernetDesc, "TCP offload enabled for packet hdrlen: "
"%d mss: %d paylen %d\n", TxdOp::hdrlen(desc),
TxdOp::mss(desc), TxdOp::getLen(desc));
"%d mss: %d paylen %d\n", txd_op::hdrlen(desc),
txd_op::mss(desc), txd_op::getLen(desc));
useTso = true;
tsoTotalLen = TxdOp::getLen(desc);
tsoTotalLen = txd_op::getLen(desc);
tsoLoadedHeader = false;
tsoDescBytesUsed = 0;
tsoUsedLen = 0;
@@ -1550,7 +1550,7 @@ IGbE::TxDescCache::processContextDesc()
tsoCopyBytes = 0;
}
TxdOp::setDd(desc);
txd_op::setDd(desc);
unusedCache.pop_front();
usedCache.push_back(desc);
}
@@ -1559,13 +1559,13 @@ IGbE::TxDescCache::processContextDesc()
return;
desc = unusedCache.front();
if (!useTso && TxdOp::isType(desc, TxdOp::TXD_ADVDATA) &&
TxdOp::tse(desc)) {
if (!useTso && txd_op::isType(desc, txd_op::TXD_ADVDATA) &&
txd_op::tse(desc)) {
DPRINTF(EthernetDesc, "TCP offload(adv) enabled for packet "
"hdrlen: %d mss: %d paylen %d\n",
tsoHeaderLen, tsoMss, TxdOp::getTsoLen(desc));
tsoHeaderLen, tsoMss, txd_op::getTsoLen(desc));
useTso = true;
tsoTotalLen = TxdOp::getTsoLen(desc);
tsoTotalLen = txd_op::getTsoLen(desc);
tsoLoadedHeader = false;
tsoDescBytesUsed = 0;
tsoUsedLen = 0;
@@ -1577,10 +1577,10 @@ IGbE::TxDescCache::processContextDesc()
if (useTso && !tsoLoadedHeader) {
// we need to fetch a header
DPRINTF(EthernetDesc, "Starting DMA of TSO header\n");
assert(TxdOp::isData(desc) && TxdOp::getLen(desc) >= tsoHeaderLen);
assert(txd_op::isData(desc) && txd_op::getLen(desc) >= tsoHeaderLen);
pktWaiting = true;
assert(tsoHeaderLen <= 256);
igbe->dmaRead(pciToDma(TxdOp::getBuf(desc)),
igbe->dmaRead(pciToDma(txd_op::getBuf(desc)),
tsoHeaderLen, &headerEvent, tsoHeader, 0);
}
}
@@ -1594,9 +1594,9 @@ IGbE::TxDescCache::headerComplete()
assert(unusedCache.size());
TxDesc *desc = unusedCache.front();
DPRINTF(EthernetDesc, "TSO: len: %d tsoHeaderLen: %d\n",
TxdOp::getLen(desc), tsoHeaderLen);
txd_op::getLen(desc), tsoHeaderLen);
if (TxdOp::getLen(desc) == tsoHeaderLen) {
if (txd_op::getLen(desc) == tsoHeaderLen) {
tsoDescBytesUsed = 0;
tsoLoadedHeader = true;
unusedCache.pop_front();
@@ -1630,24 +1630,24 @@ IGbE::TxDescCache::getPacketSize(EthPacketPtr p)
if (tsoPktHasHeader)
tsoCopyBytes = std::min((tsoMss + tsoHeaderLen) - p->length,
TxdOp::getLen(desc) - tsoDescBytesUsed);
txd_op::getLen(desc) - tsoDescBytesUsed);
else
tsoCopyBytes = std::min(tsoMss,
TxdOp::getLen(desc) - tsoDescBytesUsed);
txd_op::getLen(desc) - tsoDescBytesUsed);
unsigned pkt_size =
tsoCopyBytes + (tsoPktHasHeader ? 0 : tsoHeaderLen);
DPRINTF(EthernetDesc, "TSO: descBytesUsed: %d copyBytes: %d "
"this descLen: %d\n",
tsoDescBytesUsed, tsoCopyBytes, TxdOp::getLen(desc));
tsoDescBytesUsed, tsoCopyBytes, txd_op::getLen(desc));
DPRINTF(EthernetDesc, "TSO: pktHasHeader: %d\n", tsoPktHasHeader);
DPRINTF(EthernetDesc, "TSO: Next packet is %d bytes\n", pkt_size);
return pkt_size;
}
DPRINTF(EthernetDesc, "Next TX packet is %d bytes\n",
TxdOp::getLen(unusedCache.front()));
return TxdOp::getLen(desc);
txd_op::getLen(unusedCache.front()));
return txd_op::getLen(desc);
}
void
@@ -1660,8 +1660,8 @@ IGbE::TxDescCache::getPacketData(EthPacketPtr p)
DPRINTF(EthernetDesc, "getPacketData(): TxDescriptor data "
"d1: %#llx d2: %#llx\n", desc->d1, desc->d2);
assert((TxdOp::isLegacy(desc) || TxdOp::isData(desc)) &&
TxdOp::getLen(desc));
assert((txd_op::isLegacy(desc) || txd_op::isData(desc)) &&
txd_op::getLen(desc));
pktPtr = p;
@@ -1685,15 +1685,15 @@ IGbE::TxDescCache::getPacketData(EthPacketPtr p)
DPRINTF(EthernetDesc,
"Starting DMA of packet at offset %d length: %d\n",
p->length, tsoCopyBytes);
igbe->dmaRead(pciToDma(TxdOp::getBuf(desc))
igbe->dmaRead(pciToDma(txd_op::getBuf(desc))
+ tsoDescBytesUsed,
tsoCopyBytes, &pktEvent, p->data + p->length,
igbe->txReadDelay);
tsoDescBytesUsed += tsoCopyBytes;
assert(tsoDescBytesUsed <= TxdOp::getLen(desc));
assert(tsoDescBytesUsed <= txd_op::getLen(desc));
} else {
igbe->dmaRead(pciToDma(TxdOp::getBuf(desc)),
TxdOp::getLen(desc), &pktEvent, p->data + p->length,
igbe->dmaRead(pciToDma(txd_op::getBuf(desc)),
txd_op::getLen(desc), &pktEvent, p->data + p->length,
igbe->txReadDelay);
}
}
@@ -1710,8 +1710,8 @@ IGbE::TxDescCache::pktComplete()
desc = unusedCache.front();
assert((TxdOp::isLegacy(desc) || TxdOp::isData(desc)) &&
TxdOp::getLen(desc));
assert((txd_op::isLegacy(desc) || txd_op::isData(desc)) &&
txd_op::getLen(desc));
DPRINTF(EthernetDesc, "TxDescriptor data d1: %#llx d2: %#llx\n",
desc->d1, desc->d2);
@@ -1727,16 +1727,16 @@ IGbE::TxDescCache::pktComplete()
DPRINTF(EthernetDesc, "TSO: descBytesUsed: %d copyBytes: %d\n",
tsoDescBytesUsed, tsoCopyBytes);
} else {
pktPtr->simLength += TxdOp::getLen(desc);
pktPtr->length += TxdOp::getLen(desc);
pktPtr->simLength += txd_op::getLen(desc);
pktPtr->length += txd_op::getLen(desc);
}
if ((!TxdOp::eop(desc) && !useTso) ||
if ((!txd_op::eop(desc) && !useTso) ||
(pktPtr->length < ( tsoMss + tsoHeaderLen) &&
tsoTotalLen != tsoUsedLen && useTso)) {
assert(!useTso || (tsoDescBytesUsed == TxdOp::getLen(desc)));
assert(!useTso || (tsoDescBytesUsed == txd_op::getLen(desc)));
unusedCache.pop_front();
usedCache.push_back(desc);
@@ -1757,15 +1757,15 @@ IGbE::TxDescCache::pktComplete()
pktMultiDesc = false;
// no support for vlans
assert(!TxdOp::vle(desc));
assert(!txd_op::vle(desc));
// we only support single packet descriptors at this point
if (!useTso)
assert(TxdOp::eop(desc));
assert(txd_op::eop(desc));
// set that this packet is done
if (TxdOp::rs(desc))
TxdOp::setDd(desc);
if (txd_op::rs(desc))
txd_op::setDd(desc);
DPRINTF(EthernetDesc, "TxDescriptor data d1: %#llx d2: %#llx\n",
desc->d1, desc->d2);
@@ -1808,18 +1808,18 @@ IGbE::TxDescCache::pktComplete()
}
// Checksums are only ofloaded for new descriptor types
if (TxdOp::isData(desc) && (TxdOp::ixsm(desc) || TxdOp::txsm(desc))) {
if (txd_op::isData(desc) && (txd_op::ixsm(desc) || txd_op::txsm(desc))) {
DPRINTF(EthernetDesc, "Calculating checksums for packet\n");
IpPtr ip(pktPtr);
Ip6Ptr ip6(pktPtr);
assert(ip || ip6);
if (ip && TxdOp::ixsm(desc)) {
if (ip && txd_op::ixsm(desc)) {
ip->sum(0);
ip->sum(cksum(ip));
igbe->etherDeviceStats.txIpChecksums++;
DPRINTF(EthernetDesc, "Calculated IP checksum\n");
}
if (TxdOp::txsm(desc)) {
if (txd_op::txsm(desc)) {
TcpPtr tcp = ip ? TcpPtr(ip) : TcpPtr(ip6);
UdpPtr udp = ip ? UdpPtr(ip) : UdpPtr(ip6);
if (tcp) {
@@ -1839,7 +1839,7 @@ IGbE::TxDescCache::pktComplete()
}
}
if (TxdOp::ide(desc)) {
if (txd_op::ide(desc)) {
// Deal with the rx timer interrupts
DPRINTF(EthernetDesc, "Descriptor had IDE set\n");
if (igbe->regs.tidv.idv()) {
@@ -1858,7 +1858,7 @@ IGbE::TxDescCache::pktComplete()
}
if (!useTso || TxdOp::getLen(desc) == tsoDescBytesUsed) {
if (!useTso || txd_op::getLen(desc) == tsoDescBytesUsed) {
DPRINTF(EthernetDesc, "Descriptor Done\n");
unusedCache.pop_front();
usedCache.push_back(desc);

8
src/dev/net/i8254xGBe_defs.hh
View File

@@ -30,6 +30,7 @@
* Register and structure descriptions for Intel's 8254x line of gigabit ethernet controllers.
*/
#include "base/bitfield.hh"
#include "base/compiler.hh"
namespace iGbReg {
@@ -234,7 +235,10 @@ struct TxDesc
uint64_t d2;
};
namespace TxdOp {
GEM5_DEPRECATED_NAMESPACE(TxdOp, txd_op);
namespace txd_op
{
const uint8_t TXD_CNXT = 0x0;
const uint8_t TXD_DATA = 0x1;
const uint8_t TXD_ADVCNXT = 0x2;
@@ -291,7 +295,7 @@ inline int hdrlen(TxDesc *d) {
inline int getTsoLen(TxDesc *d) { assert(isType(d, TXD_ADVDATA)); return bits(d->d2, 63,46); }
inline int utcmd(TxDesc *d) { assert(isContext(d)); return bits(d->d2,24,31); }
} // namespace TxdOp
} // namespace txd_op
#define ADD_FIELD32(NAME, OFFSET, BITS) \