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mem-cache: Create cache compressor

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Create basic template for cache compressors. A basic compressor
must implement a compression and a decompression method.

Change-Id: I83dc4d2b8d2bc5ed9f760c938edfa4ebdd6b8583
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/11100
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
This commit is contained in:
Daniel R. Carvalho
2018-06-13 14:36:38 +02:00
committed by Daniel Carvalho
parent 4b6b068aa0
commit f21f4a049e
4 changed files with 396 additions and 0 deletions
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src/mem/cache/compressors/Compressors.py vendored Normal file
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# Copyright (c) 2018 Inria
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Daniel Carvalho
from m5.params import *
from m5.proxy import *
from m5.SimObject import SimObject
class BaseCacheCompressor(SimObject):
type = 'BaseCacheCompressor'
abstract = True
cxx_header = "mem/cache/compressors/base.hh"
block_size = Param.Int(Parent.cache_line_size, "Block size in bytes")

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# -*- mode:python -*-
# Copyright (c) 2018 Inria
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Daniel Carvalho
Import('*')
SimObject('Compressors.py')
Source('base.cc')

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/*
* Copyright (c) 2018 Inria
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Daniel Carvalho
*/
/** @file
* Definition of a basic cache compressor.
*/
#include "mem/cache/compressors/base.hh"
#include <algorithm>
#include <cstdint>
#include "debug/CacheComp.hh"
#include "mem/cache/tags/super_blk.hh"
#include "params/BaseCacheCompressor.hh"
// Uncomment this line if debugging compression
//#define DEBUG_COMPRESSION
BaseCacheCompressor::CompressionData::CompressionData()
: _size(0)
{
}
BaseCacheCompressor::CompressionData::~CompressionData()
{
}
void
BaseCacheCompressor::CompressionData::setSizeBits(std::size_t size)
{
_size = size;
}
std::size_t
BaseCacheCompressor::CompressionData::getSizeBits() const
{
return _size;
}
std::size_t
BaseCacheCompressor::CompressionData::getSize() const
{
return std::ceil(_size/8);
}
BaseCacheCompressor::BaseCacheCompressor(const Params *p)
: SimObject(p), blkSize(p->block_size)
{
}
void
BaseCacheCompressor::compress(const uint64_t* data, Cycles& comp_lat,
Cycles& decomp_lat, std::size_t& comp_size_bits)
{
// Apply compression
std::unique_ptr<CompressionData> comp_data =
compress(data, comp_lat, decomp_lat);
// If we are in debug mode apply decompression just after the compression.
// If the results do not match, we've got an error
#ifdef DEBUG_COMPRESSION
uint64_t decomp_data[blkSize/8];
// Apply decompression
decompress(comp_data.get(), decomp_data);
// Check if decompressed line matches original cache line
fatal_if(std::memcmp(data, decomp_data, blkSize),
"Decompressed line does not match original line.");
#endif
// Get compression size
comp_size_bits = comp_data->getSizeBits();
// Print debug information
DPRINTF(CacheComp, "Compressed cache line from %d to %d bits. " \
"Compression latency: %llu, decompression latency: %llu\n",
blkSize*8, comp_size_bits, comp_lat, decomp_lat);
}
Cycles
BaseCacheCompressor::getDecompressionLatency(const CacheBlk* blk)
{
const CompressionBlk* comp_blk = static_cast<const CompressionBlk*>(blk);
// If block is compressed, return its decompression latency
if (comp_blk && comp_blk->isCompressed()){
return comp_blk->getDecompressionLatency();
}
// Block is not compressed, so there is no decompression latency
return Cycles(0);
}
void
BaseCacheCompressor::setDecompressionLatency(CacheBlk* blk, const Cycles lat)
{
// Sanity check
assert(blk != nullptr);
// Assign latency
static_cast<CompressionBlk*>(blk)->setDecompressionLatency(lat);
}
void
BaseCacheCompressor::setSizeBits(CacheBlk* blk, const std::size_t size_bits)
{
// Sanity check
assert(blk != nullptr);
// Assign size
static_cast<CompressionBlk*>(blk)->setSizeBits(size_bits);
}

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/*
* Copyright (c) 2018 Inria
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Daniel Carvalho
*/
/** @file
* Definition of a basic cache compressor.
* A cache compressor must consist of a compression and a decompression
* methods. It must also be aware of the size of an uncompressed cache
* line.
*/
#ifndef __MEM_CACHE_COMPRESSORS_BASE_HH__
#define __MEM_CACHE_COMPRESSORS_BASE_HH__
#include <cstdint>
#include "base/types.hh"
#include "sim/sim_object.hh"
class CacheBlk;
struct BaseCacheCompressorParams;
/**
* Base cache compressor interface. Every cache compressor must implement a
* compression and a decompression method.
*/
class BaseCacheCompressor : public SimObject {
protected:
/**
* Forward declaration of compression data. Every new compressor must
* create a new compression data based on it.
*/
class CompressionData;
/**
* Uncompressed cache line size (in bytes).
*/
const std::size_t blkSize;
/**
* Apply the compression process to the cache line.
* Returns the number of cycles used by the compressor, however it is
* usually covered by a good pipelined execution, and is currently ignored.
* The decompression latency is also returned, in order to avoid
* increasing simulation time and memory consumption.
*
* @param cache_line The cache line to be compressed.
* @param comp_lat Compression latency in number of cycles.
* @param decomp_lat Decompression latency in number of cycles.
* @return Cache line after compression.
*/
virtual std::unique_ptr<CompressionData> compress(
const uint64_t* cache_line, Cycles& comp_lat, Cycles& decomp_lat) = 0;
/**
* Apply the decompression process to the compressed data.
*
* @param comp_data Compressed cache line.
* @param cache_line The cache line to be decompressed.
*/
virtual void decompress(const CompressionData* comp_data,
uint64_t* cache_line) = 0;
public:
/** Convenience typedef. */
typedef BaseCacheCompressorParams Params;
/**
* Default constructor.
*/
BaseCacheCompressor(const Params *p);
/**
* Default destructor.
*/
virtual ~BaseCacheCompressor() {};
/**
* Apply the compression process to the cache line. Ignores compression
* cycles.
*
* @param data The cache line to be compressed.
* @param comp_lat Compression latency in number of cycles.
* @param decomp_lat Decompression latency in number of cycles.
* @param comp_size_bits Compressed data size (in bits).
*/
void compress(const uint64_t* data, Cycles& comp_lat,
Cycles& decomp_lat, std::size_t& comp_size_bits);
/**
* Get the decompression latency if the block is compressed. Latency is 0
* otherwise.
*
* @param blk The compressed block.
*/
static Cycles getDecompressionLatency(const CacheBlk* blk);
/**
* Set the decompression latency of compressed block.
*
* @param blk The compressed block.
* @param lat The decompression latency.
*/
static void setDecompressionLatency(CacheBlk* blk, const Cycles lat);
/**
* Set the size of the compressed block, in bits.
*
* @param blk The compressed block.
* @param size_bits The block size.
*/
static void setSizeBits(CacheBlk* blk, const std::size_t size_bits);
};
class BaseCacheCompressor::CompressionData {
private:
/**
* Compressed cache line size (in bits).
*/
std::size_t _size;
public:
/**
* Default constructor.
*/
CompressionData();
/**
* Virtual destructor. Without it unique_ptr will cause mem leak.
*/
virtual ~CompressionData();
/**
* Set compression size (in bits).
*
* @param size Compressed data size.
*/
void setSizeBits(std::size_t size);
/**
* Get compression size (in bits).
*
* @return Compressed data size.
*/
std::size_t getSizeBits() const;
/**
* Get compression size (in bytes).
*
* @return Compressed data size.
*/
std::size_t getSize() const;
};
#endif //__MEM_CACHE_COMPRESSORS_BASE_HH__