python: Don't assume SimObjects live in the global namespace

The importer in Python 3 doesn't like the way we import SimObjects
from the global namespace. Convert the existing SimObject declarations
to import from m5.objects. As a side-effect, this makes these files
consistent with configuration files.

Change-Id: I11153502b430822130722839e1fa767b82a027aa
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15981
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>

src/dev/BadDevice.py

@@ -27,7 +27,7 @@
 # Authors: Nathan Binkert
 
 from m5.params import *
-from Device import BasicPioDevice
+from m5.objects.Device import BasicPioDevice
 
 class BadDevice(BasicPioDevice):
     type = 'BadDevice'

src/dev/Device.py

@@ -42,7 +42,8 @@
 from m5.params import *
 from m5.proxy import *
 from m5.util.fdthelper import *
-from MemObject import MemObject
+
+from m5.objects.MemObject import MemObject
 
 class PioDevice(MemObject):
     type = 'PioDevice'

src/dev/Platform.py

@@ -29,6 +29,7 @@
 from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
+
 class Platform(SimObject):
     type = 'Platform'
     abstract = True

src/dev/alpha/AlphaBackdoor.py

@@ -29,7 +29,8 @@
 from m5.defines import buildEnv
 from m5.params import *
 from m5.proxy import *
-from Device import BasicPioDevice
+
+from m5.objects.Device import BasicPioDevice
 
 class AlphaBackdoor(BasicPioDevice):
     type = 'AlphaBackdoor'

src/dev/alpha/Tsunami.py

@@ -28,12 +28,12 @@
 
 from m5.params import *
 from m5.proxy import *
-from BadDevice import BadDevice
-from AlphaBackdoor import AlphaBackdoor
-from Device import BasicPioDevice, IsaFake, BadAddr
-from PciHost import GenericPciHost
-from Platform import Platform
-from Uart import Uart8250
+from m5.objects.BadDevice import BadDevice
+from m5.objects.AlphaBackdoor import AlphaBackdoor
+from m5.objects.Device import BasicPioDevice, IsaFake, BadAddr
+from m5.objects.PciHost import GenericPciHost
+from m5.objects.Platform import Platform
+from m5.objects.Uart import Uart8250
 
 class TsunamiCChip(BasicPioDevice):
     type = 'TsunamiCChip'

src/dev/arm/EnergyCtrl.py

@@ -39,7 +39,7 @@
 
 from m5.params import *
 from m5.SimObject import SimObject
-from Device import BasicPioDevice
+from m5.objects.Device import BasicPioDevice
 from m5.proxy import *
 from m5.util.fdthelper import *
 

src/dev/arm/FlashDevice.py

@@ -38,7 +38,8 @@
 
 from m5.params import *
 from m5.proxy import *
-from AbstractNVM import *
+
+from m5.objects.AbstractNVM import *
 
 #Distribution of the data.
 #sequential: sequential (address n+1 is likely to be on the same plane as n)

src/dev/arm/Gic.py

@@ -40,8 +40,8 @@ from m5.proxy import *
 from m5.util.fdthelper import *
 from m5.SimObject import SimObject
 
-from Device import PioDevice
-from Platform import Platform
+from m5.objects.Device import PioDevice
+from m5.objects.Platform import Platform
 
 class BaseGic(PioDevice):
     type = 'BaseGic'

src/dev/arm/NoMali.py

@@ -36,8 +36,9 @@
 # Authors: Andreas Sandberg
 
 from m5.params import *
-from Device import BasicPioDevice
-from Gic import *
+
+from m5.objects.Device import BasicPioDevice
+from m5.objects.Gic import *
 
 class NoMaliGpuType(Enum): vals = [
     'T60x',

src/dev/arm/RealView.py

@@ -45,31 +45,32 @@ from m5.defines import buildEnv
 from m5.params import *
 from m5.proxy import *
 from m5.util.fdthelper import *
-from ClockDomain import ClockDomain
-from VoltageDomain import VoltageDomain
-from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice
-from PciHost import *
-from Ethernet import NSGigE, IGbE_igb, IGbE_e1000
-from Ide import *
-from Platform import Platform
-from Terminal import Terminal
-from Uart import Uart
-from SimpleMemory import SimpleMemory
-from Gic import *
-from EnergyCtrl import EnergyCtrl
-from ClockedObject import ClockedObject
-from ClockDomain import SrcClockDomain
-from SubSystem import SubSystem
-from Graphics import ImageFormat
-from ClockedObject import ClockedObject
-from PS2 import *
-from VirtIOMMIO import MmioVirtIO
+from m5.objects.ClockDomain import ClockDomain
+from m5.objects.VoltageDomain import VoltageDomain
+from m5.objects.Device import \
+    BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice
+from m5.objects.PciHost import *
+from m5.objects.Ethernet import NSGigE, IGbE_igb, IGbE_e1000
+from m5.objects.Ide import *
+from m5.objects.Platform import Platform
+from m5.objects.Terminal import Terminal
+from m5.objects.Uart import Uart
+from m5.objects.SimpleMemory import SimpleMemory
+from m5.objects.Gic import *
+from m5.objects.EnergyCtrl import EnergyCtrl
+from m5.objects.ClockedObject import ClockedObject
+from m5.objects.ClockDomain import SrcClockDomain
+from m5.objects.SubSystem import SubSystem
+from m5.objects.Graphics import ImageFormat
+from m5.objects.ClockedObject import ClockedObject
+from m5.objects.PS2 import *
+from m5.objects.VirtIOMMIO import MmioVirtIO
 
 # Platforms with KVM support should generally use in-kernel GIC
 # emulation. Use a GIC model that automatically switches between
 # gem5's GIC model and KVM's GIC model if KVM is available.
 try:
-    from KvmGic import MuxingKvmGic
+    from m5.objects.KvmGic import MuxingKvmGic
     kvm_gicv2_class = MuxingKvmGic
 except ImportError:
     # KVM support wasn't compiled into gem5. Fallback to a

src/dev/arm/UFSHostDevice.py

@@ -38,8 +38,8 @@
 import sys
 from m5.params import *
 from m5.proxy import *
-from Device import DmaDevice
-from AbstractNVM import *
+from m5.objects.Device import DmaDevice
+from m5.objects.AbstractNVM import *
 
 class UFSHostDevice(DmaDevice):
     type = 'UFSHostDevice'

src/dev/arm/VirtIOMMIO.py

@@ -41,9 +41,9 @@ from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
 
-from Device import BasicPioDevice
-from Gic import ArmInterruptPin
-from VirtIO import VirtIODeviceBase, VirtIODummyDevice
+from m5.objects.Device import BasicPioDevice
+from m5.objects.Gic import ArmInterruptPin
+from m5.objects.VirtIO import VirtIODeviceBase, VirtIODummyDevice
 
 class MmioVirtIO(BasicPioDevice):
     type = 'MmioVirtIO'

src/dev/i2c/I2C.py

@@ -37,7 +37,7 @@
 
 from m5.SimObject import SimObject
 from m5.params import *
-from Device import BasicPioDevice
+from m5.objects.Device import BasicPioDevice
 
 class I2CDevice(SimObject):
     type = 'I2CDevice'

src/dev/mips/Malta.py

@@ -29,10 +29,10 @@
 from m5.params import *
 from m5.proxy import *
 
-from BadDevice import BadDevice
-from Device import BasicPioDevice
-from Platform import Platform
-from Uart import Uart8250
+from m5.objects.BadDevice import BadDevice
+from m5.objects.Device import BasicPioDevice
+from m5.objects.Platform import Platform
+from m5.objects.Uart import Uart8250
 
 class MaltaCChip(BasicPioDevice):
     type = 'MaltaCChip'

src/dev/net/Ethernet.py

@@ -42,7 +42,7 @@ from m5.defines import buildEnv
 from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
-from PciDevice import PciDevice
+from m5.objects.PciDevice import PciDevice
 
 class EtherObject(SimObject):
     type = 'EtherObject'

src/dev/pci/CopyEngine.py

@@ -29,7 +29,8 @@
 from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
-from PciDevice import PciDevice
+
+from m5.objects.PciDevice import PciDevice
 
 class CopyEngine(PciDevice):
     type = 'CopyEngine'

src/dev/pci/PciDevice.py

@@ -41,8 +41,8 @@
 from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
-from Device import DmaDevice
-from PciHost import PciHost
+from m5.objects.Device import DmaDevice
+from m5.objects.PciHost import PciHost
 
 class PciDevice(DmaDevice):
     type = 'PciDevice'

src/dev/pci/PciHost.py

@@ -39,8 +39,8 @@
 from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
-from Device import PioDevice
-from Platform import Platform
+from m5.objects.Device import PioDevice
+from m5.objects.Platform import Platform
 
 class PciHost(PioDevice):
     type = 'PciHost'

src/dev/serial/Terminal.py

@@ -29,7 +29,8 @@
 from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
-from Serial import SerialDevice
+
+from m5.objects.Serial import SerialDevice
 
 class Terminal(SerialDevice):
     type = 'Terminal'

src/dev/serial/Uart.py

@@ -40,8 +40,9 @@
 
 from m5.params import *
 from m5.proxy import *
-from Device import BasicPioDevice
-from Serial import SerialDevice
+
+from m5.objects.Device import BasicPioDevice
+from m5.objects.Serial import SerialDevice
 
 class Uart(BasicPioDevice):
     type = 'Uart'

src/dev/sparc/T1000.py

@@ -28,10 +28,11 @@
 
 from m5.params import *
 from m5.proxy import *
-from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr
-from Platform import Platform
-from Terminal import Terminal
-from Uart import Uart8250
+
+from m5.objects.Device import BasicPioDevice, PioDevice, IsaFake, BadAddr
+from m5.objects.Platform import Platform
+from m5.objects.Terminal import Terminal
+from m5.objects.Uart import Uart8250
 
 
 class MmDisk(BasicPioDevice):

src/dev/storage/Ide.py

@@ -28,7 +28,7 @@
 
 from m5.SimObject import SimObject
 from m5.params import *
-from PciDevice import PciDevice
+from m5.objects.PciDevice import PciDevice
 
 class IdeID(Enum): vals = ['master', 'slave']
 

src/dev/virtio/VirtIO.py

@@ -40,8 +40,8 @@
 from m5.SimObject import SimObject
 from m5.params import *
 from m5.proxy import *
-from Device import PioDevice
-from PciDevice import PciDevice
+from m5.objects.Device import PioDevice
+from m5.objects.PciDevice import PciDevice
 
 
 class VirtIODeviceBase(SimObject):

src/dev/virtio/VirtIO9P.py

@@ -39,7 +39,7 @@
 
 from m5.params import *
 from m5.proxy import *
-from VirtIO import VirtIODeviceBase
+from m5.objects.VirtIO import VirtIODeviceBase
 
 class VirtIO9PBase(VirtIODeviceBase):
     type = 'VirtIO9PBase'

src/dev/virtio/VirtIOBlock.py

@@ -39,7 +39,7 @@
 
 from m5.params import *
 from m5.proxy import *
-from VirtIO import VirtIODeviceBase
+from m5.objects.VirtIO import VirtIODeviceBase
 
 class VirtIOBlock(VirtIODeviceBase):
     type = 'VirtIOBlock'

src/dev/virtio/VirtIOConsole.py

@@ -39,8 +39,8 @@
 
 from m5.params import *
 from m5.proxy import *
-from VirtIO import VirtIODeviceBase
-from Serial import SerialDevice
+from m5.objects.VirtIO import VirtIODeviceBase
+from m5.objects.Serial import SerialDevice
 
 class VirtIOConsole(VirtIODeviceBase):
     type = 'VirtIOConsole'

src/dev/x86/Cmos.py

@@ -28,8 +28,8 @@
 
 from m5.params import *
 from m5.proxy import *
-from Device import BasicPioDevice
-from X86IntPin import X86IntSourcePin
+from m5.objects.Device import BasicPioDevice
+from m5.objects.X86IntPin import X86IntSourcePin
 
 class Cmos(BasicPioDevice):
     type = 'Cmos'

src/dev/x86/I8042.py

@@ -28,9 +28,9 @@
 
 from m5.params import *
 from m5.proxy import *
-from Device import BasicPioDevice
-from X86IntPin import X86IntSourcePin
-from PS2 import *
+from m5.objects.Device import BasicPioDevice
+from m5.objects.X86IntPin import X86IntSourcePin
+from m5.objects.PS2 import *
 
 class I8042(BasicPioDevice):
     type = 'I8042'

src/dev/x86/I82094AA.py

@@ -28,8 +28,8 @@
 
 from m5.params import *
 from m5.proxy import *
-from Device import BasicPioDevice
-from X86IntPin import X86IntSinkPin
+from m5.objects.Device import BasicPioDevice
+from m5.objects.X86IntPin import X86IntSinkPin
 
 class I82094AA(BasicPioDevice):
     type = 'I82094AA'

src/dev/x86/I8237.py

@@ -28,7 +28,7 @@
 
 from m5.params import *
 from m5.proxy import *
-from Device import BasicPioDevice
+from m5.objects.Device import BasicPioDevice
 
 class I8237(BasicPioDevice):
     type = 'I8237'

src/dev/x86/I8254.py

@@ -28,8 +28,8 @@
 
 from m5.params import *
 from m5.proxy import *
-from Device import BasicPioDevice
-from X86IntPin import X86IntSourcePin
+from m5.objects.Device import BasicPioDevice
+from m5.objects.X86IntPin import X86IntSourcePin
 
 class I8254(BasicPioDevice):
     type = 'I8254'

src/dev/x86/I8259.py

@@ -28,8 +28,8 @@
 
 from m5.params import *
 from m5.proxy import *
-from Device import BasicPioDevice
-from X86IntPin import X86IntSourcePin, X86IntSinkPin
+from m5.objects.Device import BasicPioDevice
+from m5.objects.X86IntPin import X86IntSourcePin, X86IntSinkPin
 
 class X86I8259CascadeMode(Enum):
     map = {'I8259Master' : 0,

src/dev/x86/Pc.py

@@ -29,12 +29,12 @@
 from m5.params import *
 from m5.proxy import *
 
-from Device import IsaFake
-from Platform import Platform
-from SouthBridge import SouthBridge
-from Terminal import Terminal
-from Uart import Uart8250
-from PciHost import GenericPciHost
+from m5.objects.Device import IsaFake
+from m5.objects.Platform import Platform
+from m5.objects.SouthBridge import SouthBridge
+from m5.objects.Terminal import Terminal
+from m5.objects.Uart import Uart8250
+from m5.objects.PciHost import GenericPciHost
 
 def x86IOAddress(port):
     IO_address_space_base = 0x8000000000000000

src/dev/x86/PcSpeaker.py

@@ -28,7 +28,7 @@
 
 from m5.params import *
 from m5.proxy import *
-from Device import BasicPioDevice
+from m5.objects.Device import BasicPioDevice
 
 class PcSpeaker(BasicPioDevice):
     type = 'PcSpeaker'

src/dev/x86/SouthBridge.py

@@ -28,15 +28,15 @@
 
 from m5.params import *
 from m5.proxy import *
-from Cmos import Cmos
-from I8042 import I8042
-from I82094AA import I82094AA
-from I8237 import I8237
-from I8254 import I8254
-from I8259 import I8259
-from Ide import IdeController
-from PcSpeaker import PcSpeaker
-from X86IntPin import X86IntLine
+from m5.objects.Cmos import Cmos
+from m5.objects.I8042 import I8042
+from m5.objects.I82094AA import I82094AA
+from m5.objects.I8237 import I8237
+from m5.objects.I8254 import I8254
+from m5.objects.I8259 import I8259
+from m5.objects.Ide import IdeController
+from m5.objects.PcSpeaker import PcSpeaker
+from m5.objects.X86IntPin import X86IntLine
 from m5.SimObject import SimObject
 
 def x86IOAddress(port):