arch,cpu: Make the CPU's ISA parameter type BaseISA.

This is mostly only a superficial change since the isa parameter is
then dynamic cast to the ISA specific version inside the various
consumers, currently the SimpleThread, O3CPU and Decoder classes. If
those aren't being used, for instance in the fast model CPUs, then you
can use a different ISA implementation without any type clashes.

Change-Id: I2226ef60f9a471ae51b8bfce8683033f7854197a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25009
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2020-02-03 17:08:18 -08:00
parent d1e2f18230
commit eae03bbc9d
5 changed files with 24 additions and 21 deletions

View File

@@ -144,12 +144,12 @@ class SimpleThread : public ThreadState, public ThreadContext
// constructor: initialize SimpleThread from given process structure
// FS
SimpleThread(BaseCPU *_cpu, int _thread_num, System *_system,
BaseTLB *_itb, BaseTLB *_dtb, TheISA::ISA *_isa,
BaseTLB *_itb, BaseTLB *_dtb, BaseISA *_isa,
bool use_kernel_stats = true);
// SE
SimpleThread(BaseCPU *_cpu, int _thread_num, System *_system,
Process *_process, BaseTLB *_itb, BaseTLB *_dtb,
TheISA::ISA *_isa);
BaseISA *_isa);
virtual ~SimpleThread() {}