derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

arch,cpu: Make the CPU's ISA parameter type BaseISA.

Browse Source 
This is mostly only a superficial change since the isa parameter is
then dynamic cast to the ISA specific version inside the various
consumers, currently the SimpleThread, O3CPU and Decoder classes. If
those aren't being used, for instance in the fast model CPUs, then you
can use a different ISA implementation without any type clashes.

Change-Id: I2226ef60f9a471ae51b8bfce8683033f7854197a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25009
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2020-02-03 17:08:18 -08:00
parent d1e2f18230
commit eae03bbc9d
5 changed files with 24 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
src/cpu/simple_thread.cc
View File

@@ -75,24 +75,29 @@ using namespace std;
// constructor
SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
Process *_process, BaseTLB *_itb,
BaseTLB *_dtb, TheISA::ISA *_isa)
: ThreadState(_cpu, _thread_num, _process), isa(_isa),
BaseTLB *_dtb, BaseISA *_isa)
: ThreadState(_cpu, _thread_num, _process),
isa(dynamic_cast<TheISA::ISA *>(_isa)),
predicate(true), memAccPredicate(true),
comInstEventQueue("instruction-based event queue"),
system(_sys), itb(_itb), dtb(_dtb), decoder(TheISA::Decoder(_isa))
system(_sys), itb(_itb), dtb(_dtb), decoder(TheISA::Decoder(isa))
{
assert(isa);
clearArchRegs();
quiesceEvent = new EndQuiesceEvent(this);
}
SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
BaseTLB *_itb, BaseTLB *_dtb,
TheISA::ISA *_isa, bool use_kernel_stats)
: ThreadState(_cpu, _thread_num, NULL), isa(_isa),
BaseISA *_isa, bool use_kernel_stats)
: ThreadState(_cpu, _thread_num, NULL),
isa(dynamic_cast<TheISA::ISA *>(_isa)),
predicate(true), memAccPredicate(true),
comInstEventQueue("instruction-based event queue"),
system(_sys), itb(_itb), dtb(_dtb), decoder(TheISA::Decoder(_isa))
system(_sys), itb(_itb), dtb(_dtb), decoder(TheISA::Decoder(isa))
{
assert(isa);
quiesceEvent = new EndQuiesceEvent(this);
clearArchRegs();