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mem: Setup stats for Cache hitLatency

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Change-Id: I18de75d3b6c4ce1784b90653e2d132ffecf1b1af
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53103
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
This commit is contained in:
huangjs
2021-11-23 13:44:38 +08:00
committed by Huang Jiasen
parent 39584edc72
commit ea6b0a03d3
2 changed files with 35 additions and 0 deletions
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26
src/mem/cache/base.cc vendored
View File

@@ -1954,6 +1954,8 @@ BaseCache::CacheCmdStats::CacheCmdStats(BaseCache &c,
("number of " + name + " hits").c_str()),
ADD_STAT(misses, statistics::units::Count::get(),
("number of " + name + " misses").c_str()),
ADD_STAT(hitLatency, statistics::units::Tick::get(),
("number of " + name + " hit ticks").c_str()),
ADD_STAT(missLatency, statistics::units::Tick::get(),
("number of " + name + " miss ticks").c_str()),
ADD_STAT(accesses, statistics::units::Count::get(),
@@ -2010,6 +2012,15 @@ BaseCache::CacheCmdStats::regStatsFromParent()
misses.subname(i, system->getRequestorName(i));
}
// Hit latency statistics
hitLatency
.init(max_requestors)
.flags(total | nozero | nonan)
;
for (int i = 0; i < max_requestors; i++) {
hitLatency.subname(i, system->getRequestorName(i));
}
// Miss latency statistics
missLatency
.init(max_requestors)
@@ -2116,6 +2127,10 @@ BaseCache::CacheStats::CacheStats(BaseCache &c)
"number of demand (read+write) hits"),
ADD_STAT(overallHits, statistics::units::Count::get(),
"number of overall hits"),
ADD_STAT(demandHitLatency, statistics::units::Tick::get(),
"number of demand (read+write) hit ticks"),
ADD_STAT(overallHitLatency, statistics::units::Tick::get(),
"number of overall hit ticks"),
ADD_STAT(demandMisses, statistics::units::Count::get(),
"number of demand (read+write) misses"),
ADD_STAT(overallMisses, statistics::units::Count::get(),
@@ -2250,6 +2265,17 @@ BaseCache::CacheStats::regStats()
overallMissLatency.subname(i, system->getRequestorName(i));
}
demandHitLatency.flags(total | nozero | nonan);
demandHitLatency = SUM_DEMAND(hitLatency);
for (int i = 0; i < max_requestors; i++) {
demandHitLatency.subname(i, system->getRequestorName(i));
}
overallHitLatency.flags(total | nozero | nonan);
overallHitLatency = demandHitLatency + SUM_NON_DEMAND(hitLatency);
for (int i = 0; i < max_requestors; i++) {
overallHitLatency.subname(i, system->getRequestorName(i));
}
demandAccesses.flags(total | nozero | nonan);
demandAccesses = demandHits + demandMisses;
for (int i = 0; i < max_requestors; i++) {

9
src/mem/cache/base.hh vendored
View File

@@ -1005,6 +1005,11 @@ class BaseCache : public ClockedObject
/** Number of misses per thread for each type of command.
@sa Packet::Command */
statistics::Vector misses;
/**
* Total number of cycles per thread/command spent waiting for a hit.
* Used to calculate the average hit latency.
*/
statistics::Vector hitLatency;
/**
* Total number of cycles per thread/command spent waiting for a miss.
* Used to calculate the average miss latency.
@@ -1050,6 +1055,10 @@ class BaseCache : public ClockedObject
statistics::Formula demandHits;
/** Number of hit for all accesses. */
statistics::Formula overallHits;
/** Total number of cycles spent waiting for demand hits. */
statistics::Formula demandHitLatency;
/** Total number of cycles spent waiting for all hits. */
statistics::Formula overallHitLatency;
/** Number of misses for demand accesses. */
statistics::Formula demandMisses;