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configs: Clean setupBootLoader signature

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This is because the bus parameter is not used anymore

Change-Id: I27aa8cc064904a6e3e0376f61eb7db74ea1a4d6c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22002
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
This commit is contained in:
Giacomo Travaglini
2019-10-16 13:21:28 +01:00
parent 62a70fc3cc
commit e77b9d0424
4 changed files with 9 additions and 19 deletions
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12
configs/common/FSConfig.py
View File

@@ -297,17 +297,7 @@ def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None,
'lpj=19988480 norandmaps rw loglevel=8 ' + \
'mem=%(mem)s root=%(rootdev)s'
# When using external memory, gem5 writes the boot loader to nvmem
# and then SST will read from it, but SST can only get to nvmem from
# iobus, as gem5's membus is only used for initialization and
# SST doesn't use it. Attaching nvmem to iobus solves this issue.
# During initialization, system_port -> membus -> iobus -> nvmem.
if external_memory:
self.realview.setupBootLoader(self.iobus, self, binary)
elif ruby:
self.realview.setupBootLoader(None, self, binary)
else:
self.realview.setupBootLoader(self.membus, self, binary)
self.realview.setupBootLoader(self, binary)
if hasattr(self.realview.gic, 'cpu_addr'):
self.gic_cpu_addr = self.realview.gic.cpu_addr

2
configs/example/arm/fs_bigLITTLE.py
View File

@@ -142,7 +142,7 @@ def createSystem(caches, kernel, bootscript,
for dev in sys.pci_vio_block:
sys.attach_pci(dev)
sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary)
sys.realview.setupBootLoader(sys, SysPaths.binary)
return sys

2
configs/example/arm/starter_fs.py
View File

@@ -148,7 +148,7 @@ def create(args):
system.addCaches(want_caches, last_cache_level=2)
# Setup gem5's minimal Linux boot loader.
system.realview.setupBootLoader(system.membus, system, SysPaths.binary)
system.realview.setupBootLoader(system, SysPaths.binary)
if args.dtb:
system.dtb_filename = args.dtb

12
src/dev/arm/RealView.py
View File

@@ -600,7 +600,7 @@ class RealView(Platform):
def attachIO(self, *args, **kwargs):
self._attach_io(self._off_chip_devices(), *args, **kwargs)
def setupBootLoader(self, mem_bus, cur_sys, loc):
def setupBootLoader(self, cur_sys, loc):
cur_sys.boot_loader = loc('boot.arm')
cur_sys.atags_addr = 0x100
cur_sys.load_offset = 0
@@ -751,7 +751,7 @@ class VExpress_EMM(RealView):
self.gicv2m = Gicv2m()
self.gicv2m.frames = [Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2C1C0000)]
def setupBootLoader(self, mem_bus, cur_sys, loc):
def setupBootLoader(self, cur_sys, loc):
if not cur_sys.boot_loader:
cur_sys.boot_loader = loc('boot_emm.arm')
cur_sys.atags_addr = 0x8000000
@@ -766,7 +766,7 @@ class VExpress_EMM64(VExpress_EMM):
conf_base=0x30000000, conf_size='256MB', conf_device_bits=12,
pci_pio_base=0x2f000000)
def setupBootLoader(self, mem_bus, cur_sys, loc):
def setupBootLoader(self, cur_sys, loc):
if not cur_sys.boot_loader:
cur_sys.boot_loader = loc('boot_emm.arm64')
cur_sys.atags_addr = 0x8000000
@@ -951,7 +951,7 @@ Interrupts:
device.host = self.pci_host
self._attach_device(device, *args, **kwargs)
def setupBootLoader(self, mem_bus, cur_sys, loc):
def setupBootLoader(self, cur_sys, loc):
if not cur_sys.boot_loader:
cur_sys.boot_loader = [ loc('boot_emm.arm64'), loc('boot_emm.arm') ]
cur_sys.atags_addr = 0x8000000
@@ -1012,9 +1012,9 @@ class VExpress_GEM5_V2_Base(VExpress_GEM5_Base):
self.gic, self.gic.its
]
def setupBootLoader(self, mem_bus, cur_sys, loc):
def setupBootLoader(self, cur_sys, loc):
cur_sys.boot_loader = [ loc('boot_emm_v2.arm64') ]
super(VExpress_GEM5_V2_Base,self).setupBootLoader(mem_bus,
super(VExpress_GEM5_V2_Base,self).setupBootLoader(
cur_sys, loc)
class VExpress_GEM5_V2(VExpress_GEM5_V2_Base):