arch-riscv: Fix line length of CSRData declaration (#519)
The length of CSRData declaration must less than 79 characters Change-Id: I3767b069664690d7b4498a73536880cfa491c6e5
This commit is contained in:
Yu-Cheng Chang
@@ -508,241 +508,473 @@ constexpr uint64_t rvTypeFlags(T... args) {
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}
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const std::unordered_map<int, CSRMetadata> CSRData = {
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{CSR_USTATUS, {"ustatus", MISCREG_STATUS, rvTypeFlags(RV64, RV32)}},
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{CSR_UIE, {"uie", MISCREG_IE, rvTypeFlags(RV64, RV32)}},
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{CSR_UTVEC, {"utvec", MISCREG_UTVEC, rvTypeFlags(RV64, RV32)}},
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{CSR_USCRATCH, {"uscratch", MISCREG_USCRATCH, rvTypeFlags(RV64, RV32)}},
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{CSR_UEPC, {"uepc", MISCREG_UEPC, rvTypeFlags(RV64, RV32)}},
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{CSR_UCAUSE, {"ucause", MISCREG_UCAUSE, rvTypeFlags(RV64, RV32)}},
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{CSR_UTVAL, {"utval", MISCREG_UTVAL, rvTypeFlags(RV64, RV32)}},
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{CSR_UIP, {"uip", MISCREG_IP, rvTypeFlags(RV64, RV32)}},
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{CSR_FFLAGS, {"fflags", MISCREG_FFLAGS, rvTypeFlags(RV64, RV32)}},
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{CSR_FRM, {"frm", MISCREG_FRM, rvTypeFlags(RV64, RV32)}},
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{CSR_FCSR, {"fcsr", MISCREG_FFLAGS, rvTypeFlags(RV64, RV32)}}, // Actually FRM << 5 | FFLAGS
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{CSR_CYCLE, {"cycle", MISCREG_CYCLE, rvTypeFlags(RV64, RV32)}},
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{CSR_TIME, {"time", MISCREG_TIME, rvTypeFlags(RV64, RV32)}},
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{CSR_INSTRET, {"instret", MISCREG_INSTRET, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER03, {"hpmcounter03", MISCREG_HPMCOUNTER03, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER04, {"hpmcounter04", MISCREG_HPMCOUNTER04, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER05, {"hpmcounter05", MISCREG_HPMCOUNTER05, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER06, {"hpmcounter06", MISCREG_HPMCOUNTER06, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER07, {"hpmcounter07", MISCREG_HPMCOUNTER07, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER08, {"hpmcounter08", MISCREG_HPMCOUNTER08, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER09, {"hpmcounter09", MISCREG_HPMCOUNTER09, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER10, {"hpmcounter10", MISCREG_HPMCOUNTER10, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER11, {"hpmcounter11", MISCREG_HPMCOUNTER11, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER12, {"hpmcounter12", MISCREG_HPMCOUNTER12, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER13, {"hpmcounter13", MISCREG_HPMCOUNTER13, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER14, {"hpmcounter14", MISCREG_HPMCOUNTER14, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER15, {"hpmcounter15", MISCREG_HPMCOUNTER15, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER16, {"hpmcounter16", MISCREG_HPMCOUNTER16, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER17, {"hpmcounter17", MISCREG_HPMCOUNTER17, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER18, {"hpmcounter18", MISCREG_HPMCOUNTER18, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER19, {"hpmcounter19", MISCREG_HPMCOUNTER19, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER20, {"hpmcounter20", MISCREG_HPMCOUNTER20, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER21, {"hpmcounter21", MISCREG_HPMCOUNTER21, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER22, {"hpmcounter22", MISCREG_HPMCOUNTER22, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER23, {"hpmcounter23", MISCREG_HPMCOUNTER23, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER24, {"hpmcounter24", MISCREG_HPMCOUNTER24, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER25, {"hpmcounter25", MISCREG_HPMCOUNTER25, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER26, {"hpmcounter26", MISCREG_HPMCOUNTER26, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER27, {"hpmcounter27", MISCREG_HPMCOUNTER27, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER28, {"hpmcounter28", MISCREG_HPMCOUNTER28, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER29, {"hpmcounter29", MISCREG_HPMCOUNTER29, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER30, {"hpmcounter30", MISCREG_HPMCOUNTER30, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER31, {"hpmcounter31", MISCREG_HPMCOUNTER31, rvTypeFlags(RV64, RV32)}},
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{CSR_CYCLEH, {"cycleh", MISCREG_CYCLEH, rvTypeFlags(RV32)}},
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{CSR_TIMEH, {"timeh", MISCREG_TIMEH, rvTypeFlags(RV32)}},
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{CSR_INSTRETH, {"instreth", MISCREG_INSTRETH, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER03H, {"hpmcounter03h", MISCREG_HPMCOUNTER03H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER04H, {"hpmcounter04h", MISCREG_HPMCOUNTER04H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER05H, {"hpmcounter05h", MISCREG_HPMCOUNTER05H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER06H, {"hpmcounter06h", MISCREG_HPMCOUNTER06H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER07H, {"hpmcounter07h", MISCREG_HPMCOUNTER07H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER08H, {"hpmcounter08h", MISCREG_HPMCOUNTER08H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER09H, {"hpmcounter09h", MISCREG_HPMCOUNTER09H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER10H, {"hpmcounter10h", MISCREG_HPMCOUNTER10H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER11H, {"hpmcounter11h", MISCREG_HPMCOUNTER11H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER12H, {"hpmcounter12h", MISCREG_HPMCOUNTER12H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER13H, {"hpmcounter13h", MISCREG_HPMCOUNTER13H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER14H, {"hpmcounter14h", MISCREG_HPMCOUNTER14H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER15H, {"hpmcounter15h", MISCREG_HPMCOUNTER15H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER16H, {"hpmcounter16h", MISCREG_HPMCOUNTER16H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER17H, {"hpmcounter17h", MISCREG_HPMCOUNTER17H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER18H, {"hpmcounter18h", MISCREG_HPMCOUNTER18H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER19H, {"hpmcounter19h", MISCREG_HPMCOUNTER19H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER20H, {"hpmcounter20h", MISCREG_HPMCOUNTER20H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER21H, {"hpmcounter21h", MISCREG_HPMCOUNTER21H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER22H, {"hpmcounter22h", MISCREG_HPMCOUNTER22H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER23H, {"hpmcounter23h", MISCREG_HPMCOUNTER23H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER24H, {"hpmcounter24h", MISCREG_HPMCOUNTER24H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER25H, {"hpmcounter25h", MISCREG_HPMCOUNTER25H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER26H, {"hpmcounter26h", MISCREG_HPMCOUNTER26H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER27H, {"hpmcounter27h", MISCREG_HPMCOUNTER27H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER28H, {"hpmcounter28h", MISCREG_HPMCOUNTER28H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER29H, {"hpmcounter29h", MISCREG_HPMCOUNTER29H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER30H, {"hpmcounter30h", MISCREG_HPMCOUNTER30H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER31H, {"hpmcounter31h", MISCREG_HPMCOUNTER31H, rvTypeFlags(RV32)}},
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{CSR_USTATUS,
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{"ustatus", MISCREG_STATUS, rvTypeFlags(RV64, RV32)}},
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{CSR_UIE,
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{"uie", MISCREG_IE, rvTypeFlags(RV64, RV32)}},
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{CSR_UTVEC,
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{"utvec", MISCREG_UTVEC, rvTypeFlags(RV64, RV32)}},
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{CSR_USCRATCH,
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{"uscratch", MISCREG_USCRATCH, rvTypeFlags(RV64, RV32)}},
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{CSR_UEPC,
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{"uepc", MISCREG_UEPC, rvTypeFlags(RV64, RV32)}},
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{CSR_UCAUSE,
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{"ucause", MISCREG_UCAUSE, rvTypeFlags(RV64, RV32)}},
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{CSR_UTVAL,
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{"utval", MISCREG_UTVAL, rvTypeFlags(RV64, RV32)}},
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{CSR_UIP,
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{"uip", MISCREG_IP, rvTypeFlags(RV64, RV32)}},
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{CSR_FFLAGS,
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{"fflags", MISCREG_FFLAGS, rvTypeFlags(RV64, RV32)}},
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{CSR_FRM,
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{"frm", MISCREG_FRM, rvTypeFlags(RV64, RV32)}},
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// Actually FRM << 5 | FFLAGS
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{CSR_FCSR,
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{"fcsr", MISCREG_FFLAGS, rvTypeFlags(RV64, RV32)}},
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{CSR_CYCLE,
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{"cycle", MISCREG_CYCLE, rvTypeFlags(RV64, RV32)}},
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{CSR_TIME,
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{"time", MISCREG_TIME, rvTypeFlags(RV64, RV32)}},
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{CSR_INSTRET,
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{"instret", MISCREG_INSTRET, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER03,
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{"hpmcounter03", MISCREG_HPMCOUNTER03, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER04,
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{"hpmcounter04", MISCREG_HPMCOUNTER04, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER05,
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{"hpmcounter05", MISCREG_HPMCOUNTER05, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER06,
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{"hpmcounter06", MISCREG_HPMCOUNTER06, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER07,
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{"hpmcounter07", MISCREG_HPMCOUNTER07, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER08,
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{"hpmcounter08", MISCREG_HPMCOUNTER08, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER09,
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{"hpmcounter09", MISCREG_HPMCOUNTER09, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER10,
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{"hpmcounter10", MISCREG_HPMCOUNTER10, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER11,
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{"hpmcounter11", MISCREG_HPMCOUNTER11, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER12,
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{"hpmcounter12", MISCREG_HPMCOUNTER12, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER13,
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{"hpmcounter13", MISCREG_HPMCOUNTER13, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER14,
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{"hpmcounter14", MISCREG_HPMCOUNTER14, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER15,
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{"hpmcounter15", MISCREG_HPMCOUNTER15, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER16,
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{"hpmcounter16", MISCREG_HPMCOUNTER16, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER17,
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{"hpmcounter17", MISCREG_HPMCOUNTER17, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER18,
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{"hpmcounter18", MISCREG_HPMCOUNTER18, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER19,
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{"hpmcounter19", MISCREG_HPMCOUNTER19, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER20,
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{"hpmcounter20", MISCREG_HPMCOUNTER20, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER21,
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{"hpmcounter21", MISCREG_HPMCOUNTER21, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER22,
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{"hpmcounter22", MISCREG_HPMCOUNTER22, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER23,
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{"hpmcounter23", MISCREG_HPMCOUNTER23, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER24,
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{"hpmcounter24", MISCREG_HPMCOUNTER24, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER25,
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{"hpmcounter25", MISCREG_HPMCOUNTER25, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER26,
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{"hpmcounter26", MISCREG_HPMCOUNTER26, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER27,
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{"hpmcounter27", MISCREG_HPMCOUNTER27, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER28,
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{"hpmcounter28", MISCREG_HPMCOUNTER28, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER29,
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{"hpmcounter29", MISCREG_HPMCOUNTER29, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER30,
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{"hpmcounter30", MISCREG_HPMCOUNTER30, rvTypeFlags(RV64, RV32)}},
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{CSR_HPMCOUNTER31,
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{"hpmcounter31", MISCREG_HPMCOUNTER31, rvTypeFlags(RV64, RV32)}},
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{CSR_CYCLEH,
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{"cycleh", MISCREG_CYCLEH, rvTypeFlags(RV32)}},
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{CSR_TIMEH,
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{"timeh", MISCREG_TIMEH, rvTypeFlags(RV32)}},
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{CSR_INSTRETH,
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{"instreth", MISCREG_INSTRETH, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER03H,
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{"hpmcounter03h", MISCREG_HPMCOUNTER03H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER04H,
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{"hpmcounter04h", MISCREG_HPMCOUNTER04H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER05H,
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{"hpmcounter05h", MISCREG_HPMCOUNTER05H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER06H,
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{"hpmcounter06h", MISCREG_HPMCOUNTER06H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER07H,
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{"hpmcounter07h", MISCREG_HPMCOUNTER07H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER08H,
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{"hpmcounter08h", MISCREG_HPMCOUNTER08H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER09H,
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{"hpmcounter09h", MISCREG_HPMCOUNTER09H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER10H,
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{"hpmcounter10h", MISCREG_HPMCOUNTER10H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER11H,
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{"hpmcounter11h", MISCREG_HPMCOUNTER11H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER12H,
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{"hpmcounter12h", MISCREG_HPMCOUNTER12H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER13H,
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{"hpmcounter13h", MISCREG_HPMCOUNTER13H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER14H,
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{"hpmcounter14h", MISCREG_HPMCOUNTER14H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER15H,
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{"hpmcounter15h", MISCREG_HPMCOUNTER15H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER16H,
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{"hpmcounter16h", MISCREG_HPMCOUNTER16H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER17H,
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{"hpmcounter17h", MISCREG_HPMCOUNTER17H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER18H,
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{"hpmcounter18h", MISCREG_HPMCOUNTER18H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER19H,
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{"hpmcounter19h", MISCREG_HPMCOUNTER19H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER20H,
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{"hpmcounter20h", MISCREG_HPMCOUNTER20H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER21H,
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{"hpmcounter21h", MISCREG_HPMCOUNTER21H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER22H,
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{"hpmcounter22h", MISCREG_HPMCOUNTER22H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER23H,
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{"hpmcounter23h", MISCREG_HPMCOUNTER23H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER24H,
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{"hpmcounter24h", MISCREG_HPMCOUNTER24H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER25H,
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{"hpmcounter25h", MISCREG_HPMCOUNTER25H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER26H,
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{"hpmcounter26h", MISCREG_HPMCOUNTER26H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER27H,
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{"hpmcounter27h", MISCREG_HPMCOUNTER27H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER28H,
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{"hpmcounter28h", MISCREG_HPMCOUNTER28H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER29H,
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{"hpmcounter29h", MISCREG_HPMCOUNTER29H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER30H,
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{"hpmcounter30h", MISCREG_HPMCOUNTER30H, rvTypeFlags(RV32)}},
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{CSR_HPMCOUNTER31H,
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{"hpmcounter31h", MISCREG_HPMCOUNTER31H, rvTypeFlags(RV32)}},
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{CSR_SSTATUS, {"sstatus", MISCREG_STATUS, rvTypeFlags(RV64, RV32)}},
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{CSR_SEDELEG, {"sedeleg", MISCREG_SEDELEG, rvTypeFlags(RV64, RV32)}},
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{CSR_SIDELEG, {"sideleg", MISCREG_SIDELEG, rvTypeFlags(RV64, RV32)}},
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{CSR_SIE, {"sie", MISCREG_IE, rvTypeFlags(RV64, RV32)}},
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{CSR_STVEC, {"stvec", MISCREG_STVEC, rvTypeFlags(RV64, RV32)}},
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{CSR_SCOUNTEREN, {"scounteren", MISCREG_SCOUNTEREN, rvTypeFlags(RV64, RV32)}},
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{CSR_SSCRATCH, {"sscratch", MISCREG_SSCRATCH, rvTypeFlags(RV64, RV32)}},
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{CSR_SEPC, {"sepc", MISCREG_SEPC, rvTypeFlags(RV64, RV32)}},
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{CSR_SCAUSE, {"scause", MISCREG_SCAUSE, rvTypeFlags(RV64, RV32)}},
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{CSR_STVAL, {"stval", MISCREG_STVAL, rvTypeFlags(RV64, RV32)}},
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{CSR_SIP, {"sip", MISCREG_IP, rvTypeFlags(RV64, RV32)}},
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{CSR_SATP, {"satp", MISCREG_SATP, rvTypeFlags(RV64, RV32)}},
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{CSR_SSTATUS,
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{"sstatus", MISCREG_STATUS, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_SEDELEG,
|
||||
{"sedeleg", MISCREG_SEDELEG, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_SIDELEG,
|
||||
{"sideleg", MISCREG_SIDELEG, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_SIE,
|
||||
{"sie", MISCREG_IE, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_STVEC,
|
||||
{"stvec", MISCREG_STVEC, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_SCOUNTEREN,
|
||||
{"scounteren", MISCREG_SCOUNTEREN, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_SSCRATCH,
|
||||
{"sscratch", MISCREG_SSCRATCH, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_SEPC,
|
||||
{"sepc", MISCREG_SEPC, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_SCAUSE,
|
||||
{"scause", MISCREG_SCAUSE, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_STVAL,
|
||||
{"stval", MISCREG_STVAL, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_SIP,
|
||||
{"sip", MISCREG_IP, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_SATP,
|
||||
{"satp", MISCREG_SATP, rvTypeFlags(RV64, RV32)}},
|
||||
|
||||
{CSR_MVENDORID, {"mvendorid", MISCREG_VENDORID, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MARCHID, {"marchid", MISCREG_ARCHID, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MIMPID, {"mimpid", MISCREG_IMPID, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHARTID, {"mhartid", MISCREG_HARTID, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MSTATUS, {"mstatus", MISCREG_STATUS, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MISA, {"misa", MISCREG_ISA, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MEDELEG, {"medeleg", MISCREG_MEDELEG, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MIDELEG, {"mideleg", MISCREG_MIDELEG, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MIE, {"mie", MISCREG_IE, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MTVEC, {"mtvec", MISCREG_MTVEC, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MCOUNTEREN, {"mcounteren", MISCREG_MCOUNTEREN, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MSTATUSH, {"mstatush", MISCREG_MSTATUSH, rvTypeFlags(RV32)}},
|
||||
{CSR_MSCRATCH, {"mscratch", MISCREG_MSCRATCH, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MEPC, {"mepc", MISCREG_MEPC, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MCAUSE, {"mcause", MISCREG_MCAUSE, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MTVAL, {"mtval", MISCREG_MTVAL, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MIP, {"mip", MISCREG_IP, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPCFG0, {"pmpcfg0", MISCREG_PMPCFG0, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPCFG1, {"pmpcfg1", MISCREG_PMPCFG1, rvTypeFlags(RV32)}}, // pmpcfg1 rv32 only
|
||||
{CSR_PMPCFG2, {"pmpcfg2", MISCREG_PMPCFG2, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPCFG3, {"pmpcfg3", MISCREG_PMPCFG3, rvTypeFlags(RV32)}}, // pmpcfg3 rv32 only
|
||||
{CSR_PMPADDR00, {"pmpaddr0", MISCREG_PMPADDR00, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR01, {"pmpaddr1", MISCREG_PMPADDR01, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR02, {"pmpaddr2", MISCREG_PMPADDR02, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR03, {"pmpaddr3", MISCREG_PMPADDR03, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR04, {"pmpaddr4", MISCREG_PMPADDR04, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR05, {"pmpaddr5", MISCREG_PMPADDR05, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR06, {"pmpaddr6", MISCREG_PMPADDR06, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR07, {"pmpaddr7", MISCREG_PMPADDR07, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR08, {"pmpaddr8", MISCREG_PMPADDR08, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR09, {"pmpaddr9", MISCREG_PMPADDR09, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR10, {"pmpaddr10", MISCREG_PMPADDR10, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR11, {"pmpaddr11", MISCREG_PMPADDR11, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR12, {"pmpaddr12", MISCREG_PMPADDR12, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR13, {"pmpaddr13", MISCREG_PMPADDR13, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR14, {"pmpaddr14", MISCREG_PMPADDR14, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR15, {"pmpaddr15", MISCREG_PMPADDR15, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MCYCLE, {"mcycle", MISCREG_CYCLE, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MINSTRET, {"minstret", MISCREG_INSTRET, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER03, {"mhpmcounter03", MISCREG_HPMCOUNTER03, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER04, {"mhpmcounter04", MISCREG_HPMCOUNTER04, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER05, {"mhpmcounter05", MISCREG_HPMCOUNTER05, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER06, {"mhpmcounter06", MISCREG_HPMCOUNTER06, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER07, {"mhpmcounter07", MISCREG_HPMCOUNTER07, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER08, {"mhpmcounter08", MISCREG_HPMCOUNTER08, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER09, {"mhpmcounter09", MISCREG_HPMCOUNTER09, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER10, {"mhpmcounter10", MISCREG_HPMCOUNTER10, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER11, {"mhpmcounter11", MISCREG_HPMCOUNTER11, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER12, {"mhpmcounter12", MISCREG_HPMCOUNTER12, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER13, {"mhpmcounter13", MISCREG_HPMCOUNTER13, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER14, {"mhpmcounter14", MISCREG_HPMCOUNTER14, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER15, {"mhpmcounter15", MISCREG_HPMCOUNTER15, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER16, {"mhpmcounter16", MISCREG_HPMCOUNTER16, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER17, {"mhpmcounter17", MISCREG_HPMCOUNTER17, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER18, {"mhpmcounter18", MISCREG_HPMCOUNTER18, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER19, {"mhpmcounter19", MISCREG_HPMCOUNTER19, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER20, {"mhpmcounter20", MISCREG_HPMCOUNTER20, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER21, {"mhpmcounter21", MISCREG_HPMCOUNTER21, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER22, {"mhpmcounter22", MISCREG_HPMCOUNTER22, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER23, {"mhpmcounter23", MISCREG_HPMCOUNTER23, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER24, {"mhpmcounter24", MISCREG_HPMCOUNTER24, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER25, {"mhpmcounter25", MISCREG_HPMCOUNTER25, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER26, {"mhpmcounter26", MISCREG_HPMCOUNTER26, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER27, {"mhpmcounter27", MISCREG_HPMCOUNTER27, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER28, {"mhpmcounter28", MISCREG_HPMCOUNTER28, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER29, {"mhpmcounter29", MISCREG_HPMCOUNTER29, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER30, {"mhpmcounter30", MISCREG_HPMCOUNTER30, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER31, {"mhpmcounter31", MISCREG_HPMCOUNTER31, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MVENDORID,
|
||||
{"mvendorid", MISCREG_VENDORID, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MARCHID,
|
||||
{"marchid", MISCREG_ARCHID, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MIMPID,
|
||||
{"mimpid", MISCREG_IMPID, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHARTID,
|
||||
{"mhartid", MISCREG_HARTID, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MSTATUS,
|
||||
{"mstatus", MISCREG_STATUS, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MISA,
|
||||
{"misa", MISCREG_ISA, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MEDELEG,
|
||||
{"medeleg", MISCREG_MEDELEG, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MIDELEG,
|
||||
{"mideleg", MISCREG_MIDELEG, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MIE,
|
||||
{"mie", MISCREG_IE, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MTVEC,
|
||||
{"mtvec", MISCREG_MTVEC, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MCOUNTEREN,
|
||||
{"mcounteren", MISCREG_MCOUNTEREN, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MSTATUSH,
|
||||
{"mstatush", MISCREG_MSTATUSH, rvTypeFlags(RV32)}},
|
||||
{CSR_MSCRATCH,
|
||||
{"mscratch", MISCREG_MSCRATCH, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MEPC,
|
||||
{"mepc", MISCREG_MEPC, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MCAUSE,
|
||||
{"mcause", MISCREG_MCAUSE, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MTVAL,
|
||||
{"mtval", MISCREG_MTVAL, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MIP,
|
||||
{"mip", MISCREG_IP, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPCFG0,
|
||||
{"pmpcfg0", MISCREG_PMPCFG0, rvTypeFlags(RV64, RV32)}},
|
||||
// pmpcfg1 rv32 only
|
||||
{CSR_PMPCFG1,
|
||||
{"pmpcfg1", MISCREG_PMPCFG1, rvTypeFlags(RV32)}},
|
||||
{CSR_PMPCFG2,
|
||||
{"pmpcfg2", MISCREG_PMPCFG2, rvTypeFlags(RV64, RV32)}},
|
||||
// pmpcfg3 rv32 only
|
||||
{CSR_PMPCFG3,
|
||||
{"pmpcfg3", MISCREG_PMPCFG3, rvTypeFlags(RV32)}},
|
||||
{CSR_PMPADDR00,
|
||||
{"pmpaddr0", MISCREG_PMPADDR00, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR01,
|
||||
{"pmpaddr1", MISCREG_PMPADDR01, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR02,
|
||||
{"pmpaddr2", MISCREG_PMPADDR02, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR03,
|
||||
{"pmpaddr3", MISCREG_PMPADDR03, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR04,
|
||||
{"pmpaddr4", MISCREG_PMPADDR04, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR05,
|
||||
{"pmpaddr5", MISCREG_PMPADDR05, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR06,
|
||||
{"pmpaddr6", MISCREG_PMPADDR06, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR07,
|
||||
{"pmpaddr7", MISCREG_PMPADDR07, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR08,
|
||||
{"pmpaddr8", MISCREG_PMPADDR08, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR09,
|
||||
{"pmpaddr9", MISCREG_PMPADDR09, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR10,
|
||||
{"pmpaddr10", MISCREG_PMPADDR10, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR11,
|
||||
{"pmpaddr11", MISCREG_PMPADDR11, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR12,
|
||||
{"pmpaddr12", MISCREG_PMPADDR12, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR13,
|
||||
{"pmpaddr13", MISCREG_PMPADDR13, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR14,
|
||||
{"pmpaddr14", MISCREG_PMPADDR14, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_PMPADDR15,
|
||||
{"pmpaddr15", MISCREG_PMPADDR15, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MCYCLE,
|
||||
{"mcycle", MISCREG_CYCLE, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MINSTRET,
|
||||
{"minstret", MISCREG_INSTRET, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER03,
|
||||
{"mhpmcounter03", MISCREG_HPMCOUNTER03, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER04,
|
||||
{"mhpmcounter04", MISCREG_HPMCOUNTER04, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER05,
|
||||
{"mhpmcounter05", MISCREG_HPMCOUNTER05, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER06,
|
||||
{"mhpmcounter06", MISCREG_HPMCOUNTER06, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER07,
|
||||
{"mhpmcounter07", MISCREG_HPMCOUNTER07, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER08,
|
||||
{"mhpmcounter08", MISCREG_HPMCOUNTER08, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER09,
|
||||
{"mhpmcounter09", MISCREG_HPMCOUNTER09, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER10,
|
||||
{"mhpmcounter10", MISCREG_HPMCOUNTER10, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER11,
|
||||
{"mhpmcounter11", MISCREG_HPMCOUNTER11, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER12,
|
||||
{"mhpmcounter12", MISCREG_HPMCOUNTER12, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER13,
|
||||
{"mhpmcounter13", MISCREG_HPMCOUNTER13, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER14,
|
||||
{"mhpmcounter14", MISCREG_HPMCOUNTER14, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER15,
|
||||
{"mhpmcounter15", MISCREG_HPMCOUNTER15, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER16,
|
||||
{"mhpmcounter16", MISCREG_HPMCOUNTER16, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER17,
|
||||
{"mhpmcounter17", MISCREG_HPMCOUNTER17, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER18,
|
||||
{"mhpmcounter18", MISCREG_HPMCOUNTER18, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER19,
|
||||
{"mhpmcounter19", MISCREG_HPMCOUNTER19, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER20,
|
||||
{"mhpmcounter20", MISCREG_HPMCOUNTER20, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER21,
|
||||
{"mhpmcounter21", MISCREG_HPMCOUNTER21, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER22,
|
||||
{"mhpmcounter22", MISCREG_HPMCOUNTER22, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER23,
|
||||
{"mhpmcounter23", MISCREG_HPMCOUNTER23, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER24,
|
||||
{"mhpmcounter24", MISCREG_HPMCOUNTER24, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER25,
|
||||
{"mhpmcounter25", MISCREG_HPMCOUNTER25, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER26,
|
||||
{"mhpmcounter26", MISCREG_HPMCOUNTER26, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER27,
|
||||
{"mhpmcounter27", MISCREG_HPMCOUNTER27, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER28,
|
||||
{"mhpmcounter28", MISCREG_HPMCOUNTER28, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER29,
|
||||
{"mhpmcounter29", MISCREG_HPMCOUNTER29, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER30,
|
||||
{"mhpmcounter30", MISCREG_HPMCOUNTER30, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMCOUNTER31,
|
||||
{"mhpmcounter31", MISCREG_HPMCOUNTER31, rvTypeFlags(RV64, RV32)}},
|
||||
|
||||
{CSR_MCYCLEH, {"mcycleh", MISCREG_CYCLEH, rvTypeFlags(RV32)}},
|
||||
{CSR_MINSTRETH, {"minstreth", MISCREG_INSTRETH, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER03H, {"mhpmcounter03h", MISCREG_HPMCOUNTER03H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER04H, {"mhpmcounter04h", MISCREG_HPMCOUNTER04H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER05H, {"mhpmcounter05h", MISCREG_HPMCOUNTER05H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER06H, {"mhpmcounter06h", MISCREG_HPMCOUNTER06H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER07H, {"mhpmcounter07h", MISCREG_HPMCOUNTER07H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER08H, {"mhpmcounter08h", MISCREG_HPMCOUNTER08H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER09H, {"mhpmcounter09h", MISCREG_HPMCOUNTER09H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER10H, {"mhpmcounter10h", MISCREG_HPMCOUNTER10H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER11H, {"mhpmcounter11h", MISCREG_HPMCOUNTER11H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER12H, {"mhpmcounter12h", MISCREG_HPMCOUNTER12H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER13H, {"mhpmcounter13h", MISCREG_HPMCOUNTER13H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER14H, {"mhpmcounter14h", MISCREG_HPMCOUNTER14H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER15H, {"mhpmcounter15h", MISCREG_HPMCOUNTER15H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER16H, {"mhpmcounter16h", MISCREG_HPMCOUNTER16H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER17H, {"mhpmcounter17h", MISCREG_HPMCOUNTER17H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER18H, {"mhpmcounter18h", MISCREG_HPMCOUNTER18H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER19H, {"mhpmcounter19h", MISCREG_HPMCOUNTER19H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER20H, {"mhpmcounter20h", MISCREG_HPMCOUNTER20H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER21H, {"mhpmcounter21h", MISCREG_HPMCOUNTER21H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER22H, {"mhpmcounter22h", MISCREG_HPMCOUNTER22H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER23H, {"mhpmcounter23h", MISCREG_HPMCOUNTER23H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER24H, {"mhpmcounter24h", MISCREG_HPMCOUNTER24H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER25H, {"mhpmcounter25h", MISCREG_HPMCOUNTER25H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER26H, {"mhpmcounter26h", MISCREG_HPMCOUNTER26H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER27H, {"mhpmcounter27h", MISCREG_HPMCOUNTER27H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER28H, {"mhpmcounter28h", MISCREG_HPMCOUNTER28H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER29H, {"mhpmcounter29h", MISCREG_HPMCOUNTER29H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER30H, {"mhpmcounter30h", MISCREG_HPMCOUNTER30H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER31H, {"mhpmcounter31h", MISCREG_HPMCOUNTER31H, rvTypeFlags(RV32)}},
|
||||
{CSR_MCYCLEH,
|
||||
{"mcycleh", MISCREG_CYCLEH, rvTypeFlags(RV32)}},
|
||||
{CSR_MINSTRETH,
|
||||
{"minstreth", MISCREG_INSTRETH, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER03H,
|
||||
{"mhpmcounter03h", MISCREG_HPMCOUNTER03H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER04H,
|
||||
{"mhpmcounter04h", MISCREG_HPMCOUNTER04H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER05H,
|
||||
{"mhpmcounter05h", MISCREG_HPMCOUNTER05H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER06H,
|
||||
{"mhpmcounter06h", MISCREG_HPMCOUNTER06H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER07H,
|
||||
{"mhpmcounter07h", MISCREG_HPMCOUNTER07H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER08H,
|
||||
{"mhpmcounter08h", MISCREG_HPMCOUNTER08H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER09H,
|
||||
{"mhpmcounter09h", MISCREG_HPMCOUNTER09H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER10H,
|
||||
{"mhpmcounter10h", MISCREG_HPMCOUNTER10H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER11H,
|
||||
{"mhpmcounter11h", MISCREG_HPMCOUNTER11H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER12H,
|
||||
{"mhpmcounter12h", MISCREG_HPMCOUNTER12H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER13H,
|
||||
{"mhpmcounter13h", MISCREG_HPMCOUNTER13H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER14H,
|
||||
{"mhpmcounter14h", MISCREG_HPMCOUNTER14H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER15H,
|
||||
{"mhpmcounter15h", MISCREG_HPMCOUNTER15H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER16H,
|
||||
{"mhpmcounter16h", MISCREG_HPMCOUNTER16H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER17H,
|
||||
{"mhpmcounter17h", MISCREG_HPMCOUNTER17H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER18H,
|
||||
{"mhpmcounter18h", MISCREG_HPMCOUNTER18H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER19H,
|
||||
{"mhpmcounter19h", MISCREG_HPMCOUNTER19H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER20H,
|
||||
{"mhpmcounter20h", MISCREG_HPMCOUNTER20H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER21H,
|
||||
{"mhpmcounter21h", MISCREG_HPMCOUNTER21H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER22H,
|
||||
{"mhpmcounter22h", MISCREG_HPMCOUNTER22H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER23H,
|
||||
{"mhpmcounter23h", MISCREG_HPMCOUNTER23H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER24H,
|
||||
{"mhpmcounter24h", MISCREG_HPMCOUNTER24H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER25H,
|
||||
{"mhpmcounter25h", MISCREG_HPMCOUNTER25H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER26H,
|
||||
{"mhpmcounter26h", MISCREG_HPMCOUNTER26H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER27H,
|
||||
{"mhpmcounter27h", MISCREG_HPMCOUNTER27H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER28H,
|
||||
{"mhpmcounter28h", MISCREG_HPMCOUNTER28H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER29H,
|
||||
{"mhpmcounter29h", MISCREG_HPMCOUNTER29H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER30H,
|
||||
{"mhpmcounter30h", MISCREG_HPMCOUNTER30H, rvTypeFlags(RV32)}},
|
||||
{CSR_MHPMCOUNTER31H,
|
||||
{"mhpmcounter31h", MISCREG_HPMCOUNTER31H, rvTypeFlags(RV32)}},
|
||||
|
||||
{CSR_MHPMEVENT03, {"mhpmevent03", MISCREG_HPMEVENT03, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT04, {"mhpmevent04", MISCREG_HPMEVENT04, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT05, {"mhpmevent05", MISCREG_HPMEVENT05, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT06, {"mhpmevent06", MISCREG_HPMEVENT06, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT07, {"mhpmevent07", MISCREG_HPMEVENT07, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT08, {"mhpmevent08", MISCREG_HPMEVENT08, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT09, {"mhpmevent09", MISCREG_HPMEVENT09, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT10, {"mhpmevent10", MISCREG_HPMEVENT10, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT11, {"mhpmevent11", MISCREG_HPMEVENT11, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT12, {"mhpmevent12", MISCREG_HPMEVENT12, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT13, {"mhpmevent13", MISCREG_HPMEVENT13, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT14, {"mhpmevent14", MISCREG_HPMEVENT14, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT15, {"mhpmevent15", MISCREG_HPMEVENT15, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT16, {"mhpmevent16", MISCREG_HPMEVENT16, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT17, {"mhpmevent17", MISCREG_HPMEVENT17, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT18, {"mhpmevent18", MISCREG_HPMEVENT18, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT19, {"mhpmevent19", MISCREG_HPMEVENT19, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT20, {"mhpmevent20", MISCREG_HPMEVENT20, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT21, {"mhpmevent21", MISCREG_HPMEVENT21, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT22, {"mhpmevent22", MISCREG_HPMEVENT22, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT23, {"mhpmevent23", MISCREG_HPMEVENT23, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT24, {"mhpmevent24", MISCREG_HPMEVENT24, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT25, {"mhpmevent25", MISCREG_HPMEVENT25, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT26, {"mhpmevent26", MISCREG_HPMEVENT26, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT27, {"mhpmevent27", MISCREG_HPMEVENT27, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT28, {"mhpmevent28", MISCREG_HPMEVENT28, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT29, {"mhpmevent29", MISCREG_HPMEVENT29, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT30, {"mhpmevent30", MISCREG_HPMEVENT30, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT31, {"mhpmevent31", MISCREG_HPMEVENT31, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT03,
|
||||
{"mhpmevent03", MISCREG_HPMEVENT03, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT04,
|
||||
{"mhpmevent04", MISCREG_HPMEVENT04, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT05,
|
||||
{"mhpmevent05", MISCREG_HPMEVENT05, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT06,
|
||||
{"mhpmevent06", MISCREG_HPMEVENT06, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT07,
|
||||
{"mhpmevent07", MISCREG_HPMEVENT07, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT08,
|
||||
{"mhpmevent08", MISCREG_HPMEVENT08, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT09,
|
||||
{"mhpmevent09", MISCREG_HPMEVENT09, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT10,
|
||||
{"mhpmevent10", MISCREG_HPMEVENT10, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT11,
|
||||
{"mhpmevent11", MISCREG_HPMEVENT11, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT12,
|
||||
{"mhpmevent12", MISCREG_HPMEVENT12, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT13,
|
||||
{"mhpmevent13", MISCREG_HPMEVENT13, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT14,
|
||||
{"mhpmevent14", MISCREG_HPMEVENT14, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT15,
|
||||
{"mhpmevent15", MISCREG_HPMEVENT15, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT16,
|
||||
{"mhpmevent16", MISCREG_HPMEVENT16, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT17,
|
||||
{"mhpmevent17", MISCREG_HPMEVENT17, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT18,
|
||||
{"mhpmevent18", MISCREG_HPMEVENT18, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT19,
|
||||
{"mhpmevent19", MISCREG_HPMEVENT19, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT20,
|
||||
{"mhpmevent20", MISCREG_HPMEVENT20, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT21,
|
||||
{"mhpmevent21", MISCREG_HPMEVENT21, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT22,
|
||||
{"mhpmevent22", MISCREG_HPMEVENT22, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT23,
|
||||
{"mhpmevent23", MISCREG_HPMEVENT23, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT24,
|
||||
{"mhpmevent24", MISCREG_HPMEVENT24, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT25,
|
||||
{"mhpmevent25", MISCREG_HPMEVENT25, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT26,
|
||||
{"mhpmevent26", MISCREG_HPMEVENT26, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT27,
|
||||
{"mhpmevent27", MISCREG_HPMEVENT27, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT28,
|
||||
{"mhpmevent28", MISCREG_HPMEVENT28, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT29,
|
||||
{"mhpmevent29", MISCREG_HPMEVENT29, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT30,
|
||||
{"mhpmevent30", MISCREG_HPMEVENT30, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_MHPMEVENT31,
|
||||
{"mhpmevent31", MISCREG_HPMEVENT31, rvTypeFlags(RV64, RV32)}},
|
||||
|
||||
{CSR_TSELECT, {"tselect", MISCREG_TSELECT, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_TDATA1, {"tdata1", MISCREG_TDATA1, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_TDATA2, {"tdata2", MISCREG_TDATA2, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_TDATA3, {"tdata3", MISCREG_TDATA3, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_DCSR, {"dcsr", MISCREG_DCSR, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_DPC, {"dpc", MISCREG_DPC, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_DSCRATCH, {"dscratch", MISCREG_DSCRATCH, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_TSELECT,
|
||||
{"tselect", MISCREG_TSELECT, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_TDATA1,
|
||||
{"tdata1", MISCREG_TDATA1, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_TDATA2,
|
||||
{"tdata2", MISCREG_TDATA2, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_TDATA3,
|
||||
{"tdata3", MISCREG_TDATA3, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_DCSR,
|
||||
{"dcsr", MISCREG_DCSR, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_DPC,
|
||||
{"dpc", MISCREG_DPC, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_DSCRATCH,
|
||||
{"dscratch", MISCREG_DSCRATCH, rvTypeFlags(RV64, RV32)}},
|
||||
|
||||
{CSR_VSTART, {"vstart", MISCREG_VSTART, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VXSAT, {"vxsat" , MISCREG_VXSAT, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VXRM, {"vxrm" , MISCREG_VXRM, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VCSR, {"vcsr" , MISCREG_VCSR, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VL, {"vl" , MISCREG_VL, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VTYPE, {"vtype" , MISCREG_VTYPE, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VLENB, {"VLENB" , MISCREG_VLENB, rvTypeFlags(RV64, RV32)}}
|
||||
{CSR_VSTART,
|
||||
{"vstart", MISCREG_VSTART, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VXSAT,
|
||||
{"vxsat", MISCREG_VXSAT, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VXRM,
|
||||
{"vxrm", MISCREG_VXRM, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VCSR,
|
||||
{"vcsr", MISCREG_VCSR, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VL,
|
||||
{"vl", MISCREG_VL, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VTYPE,
|
||||
{"vtype", MISCREG_VTYPE, rvTypeFlags(RV64, RV32)}},
|
||||
{CSR_VLENB,
|
||||
{"VLENB", MISCREG_VLENB, rvTypeFlags(RV64, RV32)}}
|
||||
};
|
||||
|
||||
/**
|
||||
|
||||
Reference in New Issue
Block a user