arch,cpu,sim: Store registers in InstRecord with InstResult.

The InstResult knows how to print registers without having to know about
their actual types.

Change-Id: Ib858e32a7b2fabbde4857165b9e88e87294942c8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50254
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
This commit is contained in:
Gabe Black
2021-09-11 04:19:55 -07:00
parent 81e07670b9
commit e425bcabd2
8 changed files with 55 additions and 65 deletions

View File

@@ -109,7 +109,7 @@ output exec {{
if (isNan(&src_bits, 32) ) {
mips_nan = MIPS32_QNAN;
xc->setRegOperand(inst, 0, mips_nan);
if (traceData) { traceData->setData(mips_nan); }
if (traceData) { traceData->setData(floatRegClass, mips_nan); }
return true;
}
}
@@ -139,7 +139,7 @@ output exec {{
//Write FCSR from FloatRegFile
cpu->tcBase()->setReg(float_reg::Fcsr, new_fcsr);
if (traceData) { traceData->setData(mips_nan); }
if (traceData) { traceData->setData(floatRegClass, mips_nan); }
return true;
}