cpu: Fix transitive includes in the O3 rename map and debug faults.

Change-Id: I22f80c24c3128e91fd039b8e3b689d7065440ad0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42964
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
This commit is contained in:
Gabe Black
2021-03-15 01:30:50 -07:00
parent 122ff006c3
commit e1f2608141
2 changed files with 2 additions and 0 deletions

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@@ -41,6 +41,7 @@
#include <string>
#include "base/logging.hh"
#include "cpu/thread_context.hh"
#include "sim/faults.hh"
namespace GenericISA

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@@ -46,6 +46,7 @@
#include <utility>
#include <vector>
#include "arch/generic/isa.hh"
#include "arch/types.hh"
#include "config/the_isa.hh"
#include "cpu/o3/free_list.hh"