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systemc: Implement register_port in all the predefined channels.

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Something the Accellera implementation does which would be good to do
in the gem5 implementation is to create a base class for sc_signal
which isn't templated, and which holds the common/non-type specific
versions of the various sc_signal methods. This will reduce code
redundancy and binary size, and also let us hide more code in .cc
files so that it's less likely we'd need to recompile model code to
fix a bug.

Also, since this all uses of sc_channel_warn_unimple have now been
eliminated, remove that function.

Change-Id: Ia574647c034e7136093c2047b69de725ac34f52f
Reviewed-on: https://gem5-review.googlesource.com/c/13200
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
This commit is contained in:
Gabe Black
2018-10-01 03:59:05 -07:00
parent b2e1f81f51
commit e16ca903f2
14 changed files with 117 additions and 110 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/systemc/channel/SConscript
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@@ -36,4 +36,3 @@ if env['USE_SYSTEMC']:
Source('sc_mutex.cc')
Source('sc_semaphore.cc')
Source('sc_signal_resolved.cc')
Source('warn_unimpl.cc')

42
src/systemc/channel/warn_unimpl.cc
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@@ -1,42 +0,0 @@
/*
* Copyright 2018 Google, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Gabe Black
*/
#include "base/logging.hh"
#include "systemc/ext/channel/warn_unimpl.hh"
namespace sc_core
{
void
sc_channel_warn_unimpl(const char *func)
{
warn("%s not implemented.\n", func);
}
} // namespace sc_core

35
src/systemc/ext/channel/sc_fifo.hh
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@@ -31,12 +31,13 @@
#define __SYSTEMC_EXT_CHANNEL_SC_FIFO_HH__
#include <list>
#include <string>
#include "../core/sc_module.hh" // for sc_gen_unique_name
#include "../core/sc_prim.hh"
#include "../utils/sc_report_handler.hh"
#include "sc_fifo_in_if.hh"
#include "sc_fifo_out_if.hh"
#include "warn_unimpl.hh"
namespace sc_core
{
@@ -53,18 +54,39 @@ class sc_fifo : public sc_fifo_in_if<T>,
explicit sc_fifo(int size=16) :
sc_fifo_in_if<T>(), sc_fifo_out_if<T>(),
sc_prim_channel(sc_gen_unique_name("fifo")),
_size(size), _readsHappened(false)
_size(size), _readsHappened(false), _reader(NULL), _writer(NULL)
{}
explicit sc_fifo(const char *name, int size=16) :
sc_fifo_in_if<T>(), sc_fifo_out_if<T>(),
sc_prim_channel(name), _size(size), _readsHappened(false)
sc_prim_channel(name), _size(size), _readsHappened(false),
_reader(NULL), _writer(NULL)
{}
virtual ~sc_fifo() {}
virtual void
register_port(sc_port_base &, const char *)
register_port(sc_port_base &port, const char *iface_type_name)
{
sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
std::string tn(iface_type_name);
if (tn == typeid(sc_fifo_in_if<T>).name() ||
tn == typeid(sc_fifo_blocking_in_if<T>).name()) {
if (_reader) {
SC_REPORT_ERROR(
"(E104) sc_fifo<T> cannot have more than one reader",
"");
}
_reader = &port;
} else if (tn == typeid(sc_fifo_out_if<T>).name() ||
tn == typeid(sc_fifo_blocking_out_if<T>).name()) {
if (_writer) {
SC_REPORT_ERROR(
"(E105) sc_fifo<T> cannot have more than one writer",
"");
}
_writer = &port;
} else {
SC_REPORT_ERROR("(E107) bind interface to port failed",
"sc_fifo<T> port not recognized");
}
}
virtual void
@@ -192,6 +214,9 @@ class sc_fifo : public sc_fifo_in_if<T>,
sc_event _dataReadEvent;
sc_event _dataWriteEvent;
sc_port_base *_reader;
sc_port_base *_writer;
int _size;
mutable std::list<T> _entries;
mutable std::list<T> _pending;

94
src/systemc/ext/channel/sc_signal.hh
View File

@@ -31,6 +31,7 @@
#define __SYSTEMC_EXT_CHANNEL_SC_SIGNAL_HH__
#include <iostream>
#include <sstream>
#include <string>
#include <vector>
@@ -39,7 +40,6 @@
#include "../core/sc_prim.hh"
#include "../dt/bit/sc_logic.hh"
#include "sc_signal_inout_if.hh"
#include "warn_unimpl.hh" // for warn_unimpl
namespace sc_core
{
@@ -53,22 +53,41 @@ class sc_signal : public sc_signal_inout_if<T>,
public:
sc_signal() : sc_signal_inout_if<T>(),
sc_prim_channel(sc_gen_unique_name("signal")),
m_cur_val(T()), m_new_val(T()), _changeStamp(~0ULL)
m_cur_val(T()), m_new_val(T()), _changeStamp(~0ULL),
_gem5Writer(NULL)
{}
explicit sc_signal(const char *name) :
sc_signal_inout_if<T>(), sc_prim_channel(name),
m_cur_val(T()), m_new_val(T()), _changeStamp(~0ULL)
m_cur_val(T()), m_new_val(T()), _changeStamp(~0ULL),
_gem5Writer(NULL)
{}
explicit sc_signal(const char *name, const T &initial_value) :
sc_signal_inout_if<T>(), sc_prim_channel(name),
m_cur_val(initial_value), m_new_val(initial_value), _changeStamp(~0ULL)
m_cur_val(initial_value), m_new_val(initial_value),
_changeStamp(~0ULL), _gem5Writer(NULL)
{}
virtual ~sc_signal() {}
virtual void
register_port(sc_port_base &, const char *)
register_port(sc_port_base &port, const char *iface_type_name)
{
sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
if (WRITER_POLICY == SC_ONE_WRITER &&
std::string(iface_type_name) ==
typeid(sc_signal_inout_if<T>).name()) {
if (_gem5Writer) {
std::ostringstream ss;
ss << "\n signal " << "`" << name() << "' (" <<
kind() << ")";
ss << "\n first driver `" << _gem5Writer->name() << "' (" <<
_gem5Writer->kind() << ")";
ss << "\n second driver `" << port.name() << "' (" <<
port.kind() << ")";
SC_REPORT_ERROR(
"(E115) sc_signal<T> cannot have more than one driver",
ss.str().c_str());
}
_gem5Writer = &port;
}
}
virtual const T &read() const { return m_cur_val; }
@@ -156,6 +175,7 @@ class sc_signal : public sc_signal_inout_if<T>,
private:
sc_event _valueChangedEvent;
uint64_t _changeStamp;
sc_port_base *_gem5Writer;
// Disabled
sc_signal(const sc_signal<T, WRITER_POLICY> &) :
@@ -179,24 +199,43 @@ class sc_signal<bool, WRITER_POLICY> :
sc_signal() : sc_signal_inout_if<bool>(),
sc_prim_channel(sc_gen_unique_name("signal")),
m_cur_val(bool()), m_new_val(bool()),
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL)
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL),
_gem5Writer(NULL)
{}
explicit sc_signal(const char *name) :
sc_signal_inout_if<bool>(), sc_prim_channel(name),
m_cur_val(bool()), m_new_val(bool()),
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL)
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL),
_gem5Writer(NULL)
{}
explicit sc_signal(const char *name, const bool &initial_value) :
sc_signal_inout_if<bool>(), sc_prim_channel(name),
m_cur_val(initial_value), m_new_val(initial_value),
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL)
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL),
_gem5Writer(NULL)
{}
virtual ~sc_signal() {}
virtual void
register_port(sc_port_base &, const char *)
register_port(sc_port_base &port, const char *iface_type_name)
{
sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
if (WRITER_POLICY == SC_ONE_WRITER &&
std::string(iface_type_name) ==
typeid(sc_signal_inout_if<bool>).name()) {
if (_gem5Writer) {
std::ostringstream ss;
ss << "\n signal " << "`" << name() << "' (" <<
kind() << ")";
ss << "\n first driver `" << _gem5Writer->name() << "' (" <<
_gem5Writer->kind() << ")";
ss << "\n second driver `" << port.name() << "' (" <<
port.kind() << ")";
SC_REPORT_ERROR(
"(E115) sc_signal<T> cannot have more than one driver",
ss.str().c_str());
}
_gem5Writer = &port;
}
}
virtual const bool &read() const { return m_cur_val; }
@@ -314,6 +353,8 @@ class sc_signal<bool, WRITER_POLICY> :
uint64_t _posStamp;
uint64_t _negStamp;
sc_port_base *_gem5Writer;
// Disabled
sc_signal(const sc_signal<bool, WRITER_POLICY> &) :
sc_signal_inout_if<bool>(), sc_prim_channel("")
@@ -328,25 +369,44 @@ class sc_signal<sc_dt::sc_logic, WRITER_POLICY> :
sc_signal() : sc_signal_inout_if<sc_dt::sc_logic>(),
sc_prim_channel(sc_gen_unique_name("signal")),
m_cur_val(sc_dt::sc_logic()), m_new_val(sc_dt::sc_logic()),
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL)
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL),
_gem5Writer(NULL)
{}
explicit sc_signal(const char *name) :
sc_signal_inout_if<sc_dt::sc_logic>(), sc_prim_channel(name),
m_cur_val(sc_dt::sc_logic()), m_new_val(sc_dt::sc_logic()),
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL)
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL),
_gem5Writer(NULL)
{}
explicit sc_signal(const char *name,
const sc_dt::sc_logic &initial_value) :
sc_signal_inout_if<sc_dt::sc_logic>(), sc_prim_channel(name),
m_cur_val(initial_value), m_new_val(initial_value),
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL)
_changeStamp(~0ULL), _posStamp(~0ULL), _negStamp(~0ULL),
_gem5Writer(NULL)
{}
virtual ~sc_signal() {}
virtual void
register_port(sc_port_base &, const char *)
register_port(sc_port_base &port, const char *iface_type_name)
{
sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
if (WRITER_POLICY == SC_ONE_WRITER &&
std::string(iface_type_name) ==
typeid(sc_signal_inout_if<sc_dt::sc_logic>).name()) {
if (_gem5Writer) {
std::ostringstream ss;
ss << "\n signal " << "`" << name() << "' (" <<
kind() << ")";
ss << "\n first driver `" << _gem5Writer->name() << "' (" <<
_gem5Writer->kind() << ")";
ss << "\n second driver `" << port.name() << "' (" <<
port.kind() << ")";
SC_REPORT_ERROR(
"(E115) sc_signal<T> cannot have more than one driver",
ss.str().c_str());
}
_gem5Writer = &port;
}
}
virtual const sc_dt::sc_logic &read() const { return m_cur_val; }
@@ -464,6 +524,8 @@ class sc_signal<sc_dt::sc_logic, WRITER_POLICY> :
uint64_t _posStamp;
uint64_t _negStamp;
sc_port_base *_gem5Writer;
// Disabled
sc_signal(const sc_signal<sc_dt::sc_logic, WRITER_POLICY> &) :
sc_signal_inout_if<sc_dt::sc_logic>(), sc_prim_channel("")

7
src/systemc/ext/channel/sc_signal_rv.hh
View File

@@ -35,7 +35,6 @@
#include "../dt/bit/sc_logic.hh"
#include "../dt/bit/sc_lv.hh"
#include "sc_signal.hh"
#include "warn_unimpl.hh"
namespace sc_dt
{
@@ -62,11 +61,7 @@ class sc_signal_rv : public sc_signal<sc_dt::sc_lv<W>, SC_MANY_WRITERS>
{}
virtual ~sc_signal_rv() {}
virtual void
register_port(sc_port_base &, const char *)
{
sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
}
virtual void register_port(sc_port_base &, const char *) {}
virtual void
write(const sc_dt::sc_lv<W> &l)

40
src/systemc/ext/channel/warn_unimpl.hh
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@@ -1,40 +0,0 @@
/*
* Copyright 2018 Google, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Gabe Black
*/
#ifndef __SYSTEMC_EXT_CHANNEL_WARN_UNIMPL_HH__
#define __SYSTEMC_EXT_CHANNEL_WARN_UNIMPL_HH__
namespace sc_core
{
void sc_channel_warn_unimpl(const char *func);
} // namespace sc_core
#endif //__SYSTEMC_EXT_CHANNEL_WARN_UNIMPL_HH__

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src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/expected_returncode Normal file
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@@ -0,0 +1 @@
1

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src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/expected_returncode Normal file
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1

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src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/expected_returncode Normal file
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1

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src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/expected_returncode Normal file
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1

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src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/expected_returncode Normal file
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1

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src/systemc/tests/systemc/communication/sc_signal/register_port/test01/expected_returncode Normal file
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1

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src/systemc/tests/systemc/communication/sc_signal/register_port/test02/expected_returncode Normal file
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1

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src/systemc/tests/systemc/communication/sc_signal/register_port/test03/expected_returncode Normal file
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@@ -0,0 +1 @@
1