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arch-arm: Don't use TheISA in the ARM implementation.

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We know what ISA we're using, so we can use ArmISA directly.

Change-Id: I7d207eea2581bae8be3e870883de88bf2879ef12
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39657
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2021-01-24 21:58:59 -08:00
parent 6b90ee8142
commit e0441fa7a7
1 changed files with 1 additions and 1 deletions
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2
src/arch/arm/tracers/tarmac_parser.cc
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@@ -828,7 +828,7 @@ TarmacParserRecord::TarmacParserRecordEvent::process()
case REG_Z:
{
int8_t i = maxVectorLength;
const TheISA::VecRegContainer& vc = thread->readVecReg(
const ArmISA::VecRegContainer& vc = thread->readVecReg(
RegId(VecRegClass, it->index));
auto vv = vc.as<uint64_t>();
while (i > 0) {