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ARM: Eliminate the old memory formats which are no longer used.

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This commit is contained in:
Gabe Black
2010-06-02 12:58:01 -05:00
parent 1905024766
commit deb6e8f805
4 changed files with 0 additions and 221 deletions
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19
src/arch/arm/insts/mem.cc
View File

@@ -67,23 +67,4 @@ MemoryNew::printInst(std::ostream &os, AddrMode addrMode) const
}
}
std::string
Memory::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
std::stringstream ss;
printMnemonic(ss);
printReg(ss, machInst.rd);
ss << ", [";
printReg(ss, machInst.rn);
ss << ", ";
if (machInst.puswl.prepost == 1)
printOffset(ss);
ss << "]";
if (machInst.puswl.prepost == 0)
printOffset(ss);
else if (machInst.puswl.writeback)
ss << "!";
return ss.str();
}
}

103
src/arch/arm/insts/mem.hh
View File

@@ -229,109 +229,6 @@ class MemoryNewPostIndex : public Base
return ss.str();
}
};
/**
* Base class for general Arm memory-format instructions.
*/
class Memory : public PredOp
{
protected:
/// Memory request flags. See mem_req_base.hh.
unsigned memAccessFlags;
/// Displacement for EA calculation (signed).
int32_t disp;
int32_t disp8;
int32_t up;
int32_t hilo,
shift_size,
shift;
/// Constructor
Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
: PredOp(mnem, _machInst, __opClass),
memAccessFlags(0),
disp(machInst.immed11_0),
disp8(machInst.immed7_0 << 2),
up(machInst.puswl.up),
hilo((machInst.immedHi11_8 << 4) | machInst.immedLo3_0),
shift_size(machInst.shiftSize), shift(machInst.shift)
{
}
std::string
generateDisassembly(Addr pc, const SymbolTable *symtab) const;
virtual void
printOffset(std::ostream &os) const
{}
};
class MemoryDisp : public Memory
{
protected:
/// Constructor
MemoryDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
: Memory(mnem, _machInst, __opClass)
{
}
void
printOffset(std::ostream &os) const
{
ccprintf(os, "#%#x", (machInst.puswl.up ? disp : -disp));
}
};
class MemoryHilo : public Memory
{
protected:
/// Constructor
MemoryHilo(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
: Memory(mnem, _machInst, __opClass)
{
}
void
printOffset(std::ostream &os) const
{
ccprintf(os, "#%#x", (machInst.puswl.up ? hilo : -hilo));
}
};
class MemoryShift : public Memory
{
protected:
/// Constructor
MemoryShift(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
: Memory(mnem, _machInst, __opClass)
{
}
void
printOffset(std::ostream &os) const
{
printShiftOperand(os);
}
};
class MemoryReg : public Memory
{
protected:
/// Constructor
MemoryReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
: Memory(mnem, _machInst, __opClass)
{
}
void
printOffset(std::ostream &os) const
{
os << (machInst.puswl.up ? "+ " : "- ");
printReg(os, machInst.rm);
}
};
}
#endif //__ARCH_ARM_INSTS_MEM_HH__

63
src/arch/arm/isa/formats/mem.isa
View File

@@ -39,50 +39,6 @@
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Authors: Gabe Black
// Stephen Hines
////////////////////////////////////////////////////////////////////
//
// Memory-format instructions
//
def template LoadStoreDeclare {{
/**
* Static instruction class for "%(mnemonic)s".
*/
class %(class_name)s : public %(base_class)s
{
public:
/// Constructor.
%(class_name)s(ExtMachInst machInst);
%(BasicExecDeclare)s
%(InitiateAccDeclare)s
%(CompleteAccDeclare)s
};
}};
def template InitiateAccDeclare {{
Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
}};
def template CompleteAccDeclare {{
Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const;
}};
def template LoadStoreConstructor {{
inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
{
%(constructor)s;
}
}};
def format AddrMode2(imm) {{
if eval(imm):
@@ -514,22 +470,3 @@ def format Thumb16MemLit() {{
''' % loadImmClassName(False, True, False)
}};
def format ArmLoadMemory(memacc_code, ea_code = {{ EA = Rn + disp; }},
mem_flags = [], inst_flags = []) {{
ea_code = ArmGenericCodeSubs(ea_code)
memacc_code = ArmGenericCodeSubs(memacc_code)
(header_output, decoder_output, decode_block, exec_output) = \
LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
decode_template = BasicDecode,
exec_template_base = 'Load')
}};
def format ArmStoreMemory(memacc_code, ea_code = {{ EA = Rn + disp; }},
mem_flags = [], inst_flags = []) {{
ea_code = ArmGenericCodeSubs(ea_code)
memacc_code = ArmGenericCodeSubs(memacc_code)
(header_output, decoder_output, decode_block, exec_output) = \
LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
exec_template_base = 'Store')
}};

36
src/arch/arm/isa/formats/util.isa
View File

@@ -38,42 +38,6 @@ def ArmGenericCodeSubs(code):
new_code = re.sub(r'Rm_Rs',
'shift_rm_rs(Rm, Rs, shift, CondCodes<29:>)', new_code)
return new_code
def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
base_class = 'Memory',
decode_template = BasicDecode, exec_template_base = ''):
# Make sure flags are in lists (convert to lists if not).
mem_flags = makeList(mem_flags)
inst_flags = makeList(inst_flags)
iop = InstObjParams(name, Name, base_class,
{'ea_code': ea_code,
'memacc_code': memacc_code,
'predicate_test': predicateTest},
inst_flags)
if mem_flags:
s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
iop.constructor += s
memacc_iop.constructor += s
# select templates
# The InitiateAcc template is the same for StoreCond templates as the
# corresponding Store template..
StoreCondInitiateAcc = StoreInitiateAcc
fullExecTemplate = eval(exec_template_base + 'Execute')
initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
# (header_output, decoder_output, decode_block, exec_output)
return (LoadStoreDeclare.subst(iop),
LoadStoreConstructor.subst(iop),
decode_template.subst(iop),
fullExecTemplate.subst(iop)
+ initiateAccTemplate.subst(iop)
+ completeAccTemplate.subst(iop))
}};