cpu-simple: Use PCStateBase instead of TheISA::PCState.

There are still occurrances of TheISA::PCState, but these are just for
compatibility with other interfaces.

Change-Id: I5538f1483608625221aab7f87a0d7d3ee5488b64
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52050
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2021-10-13 23:53:21 -07:00
parent 7497caefa5
commit dba6300f43
2 changed files with 6 additions and 6 deletions

View File

@@ -369,9 +369,10 @@ BaseSimpleCPU::preExecute()
// Use a fake sequence number since we only have one
// instruction in flight at the same time.
const InstSeqNum cur_sn(0);
t_info.predPC = thread->pcState();
set(t_info.predPC, thread->pcState());
const bool predict_taken(
branchPred->predict(curStaticInst, cur_sn, t_info.predPC,
branchPred->predict(curStaticInst, cur_sn,
t_info.predPC->as<TheISA::PCState>(),
curThread));
if (predict_taken)
@@ -386,8 +387,7 @@ BaseSimpleCPU::postExecute()
assert(curStaticInst);
TheISA::PCState pc = threadContexts[curThread]->pcState();
Addr instAddr = pc.instAddr();
Addr instAddr = threadContexts[curThread]->pcState().instAddr();
if (curStaticInst->isMemRef()) {
t_info.execContextStats.numMemRefs++;
@@ -484,7 +484,7 @@ BaseSimpleCPU::advancePC(const Fault &fault)
// instruction in flight at the same time.
const InstSeqNum cur_sn(0);
if (t_info.predPC == thread->pcState()) {
if (t_info.predPC->as<TheISA::PCState>() == thread->pcState()) {
// Correctly predicted branch
branchPred->update(cur_sn, curThread);
} else {

View File

@@ -70,7 +70,7 @@ class SimpleExecContext : public ExecContext
bool stayAtPC;
// Branch prediction
TheISA::PCState predPC;
std::unique_ptr<PCStateBase> predPC;
/** PER-THREAD STATS */
Counter numInst;