cpu-simple: Use PCStateBase instead of TheISA::PCState.
There are still occurrances of TheISA::PCState, but these are just for compatibility with other interfaces. Change-Id: I5538f1483608625221aab7f87a0d7d3ee5488b64 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52050 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Maintainer: Gabe Black <gabe.black@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
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@@ -369,9 +369,10 @@ BaseSimpleCPU::preExecute()
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// Use a fake sequence number since we only have one
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// instruction in flight at the same time.
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const InstSeqNum cur_sn(0);
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t_info.predPC = thread->pcState();
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set(t_info.predPC, thread->pcState());
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const bool predict_taken(
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branchPred->predict(curStaticInst, cur_sn, t_info.predPC,
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branchPred->predict(curStaticInst, cur_sn,
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t_info.predPC->as<TheISA::PCState>(),
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curThread));
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if (predict_taken)
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@@ -386,8 +387,7 @@ BaseSimpleCPU::postExecute()
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assert(curStaticInst);
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TheISA::PCState pc = threadContexts[curThread]->pcState();
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Addr instAddr = pc.instAddr();
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Addr instAddr = threadContexts[curThread]->pcState().instAddr();
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if (curStaticInst->isMemRef()) {
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t_info.execContextStats.numMemRefs++;
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@@ -484,7 +484,7 @@ BaseSimpleCPU::advancePC(const Fault &fault)
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// instruction in flight at the same time.
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const InstSeqNum cur_sn(0);
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if (t_info.predPC == thread->pcState()) {
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if (t_info.predPC->as<TheISA::PCState>() == thread->pcState()) {
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// Correctly predicted branch
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branchPred->update(cur_sn, curThread);
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} else {
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@@ -70,7 +70,7 @@ class SimpleExecContext : public ExecContext
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bool stayAtPC;
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// Branch prediction
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TheISA::PCState predPC;
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std::unique_ptr<PCStateBase> predPC;
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/** PER-THREAD STATS */
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Counter numInst;
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