hsail: Remove the MiscReg type.

It has been replaced by the ISA agnostic RegVal.

Change-Id: I563ea3852e37b5c1cf51eb0ac9a6f2a827ba89cf
Reviewed-on: https://gem5-review.googlesource.com/c/14464
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
This commit is contained in:
Gabe Black
2018-11-19 19:03:24 -08:00
parent d65f3f9a84
commit db190b8e68

View File

@@ -45,8 +45,6 @@
namespace HsailISA
{
typedef uint64_t MiscReg;
class GPUISA
{
public:
@@ -55,12 +53,12 @@ namespace HsailISA
}
void
writeMiscReg(int opIdx, MiscReg operandVal)
writeMiscReg(int opIdx, RegVal operandVal)
{
fatal("HSAIL does not implement misc registers yet\n");
}
MiscReg
RegVal
readMiscReg(int opIdx) const
{
fatal("HSAIL does not implement misc registers yet\n");